Miguel Urteaga

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Miguel Urteaga A Ph. D. thesis proposal, July
16th, 2002
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Outline

• Motivation
• Research to Date
• Proposed Research
• Demonstration of high-bandwidth
  manufacturable InP mesa-HBTs
• Circuit demonstrations in technology

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Motivation
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Why do we want fast transistors?
Fiber Optic Communication Systems 40 Gb/s, 160
Gb/s(?) long haul links mm-Wave Wireless
Transmission high bandwidth communication
links, atmospheric sensing, automotive
radar Military Electronics Applications gt 100
GHz mixed-signal ICs for digital microwave
radar
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InP vs Si/SiGe HBTs
InP system has inherent material advantages over
Si/SiGe 20x lower base sheet resistance, 5 x
higher electron velocity, 4x higher
breakdown-at same ft. but Current generation
production Si/SiGe HBTs are almost as fast as
InP counterparts due to 5x smaller
scaling and SiGe HBTs offer much higher levels
of integration due to underlying Si
platform
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Scaling Laws for HBTs
Reduce vertical dimensions to decrease transit
times Reduce lateral dimensions to decrease RC
time constants Increase current density to
decrease charging resistances For a x 2
improvement of all parasitics ft, fmax, logic
speed... base Ö2 1 thinnercollector 21
thinner emitter, collector junctions 41
narrower current density 41 higher emitter
Ohmic, collector Ohmic 41 less resistive
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Which technology is built to scale?
C
E
B
InP mesa-HBT before passivation
Cross-section of SiGe HBT
Narrow emitter 0.18 um Self-aligned regrown
emitter High current density 10 mA/um2SiO2
trenches small collector capacitancePlanar
device high yield
Wide emitter gt1 um Self-aligned base metal
liftoff low yield Low current density 2
mA/um2Parasitic base collector capacitance under
base contacts Non-planar device low yield
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Key Challenges for InP HBTs

• Scaling of collector-base junction
• High yield self-aligned base-emitter junction
  formation
• Improving emitter Ohmic contacts
• Heat flow for high current-density operation
• Device passivation for long-term reliability
• Planar process flow for high levels of
  integration

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Revolutionary Approach Si like InP HBT
Objectives Extreme parasitic reduction
speedFully planar device yieldSilicon-like
structure yield Approach Implanted isolated
subcollectorplanar surface yield Pedestal
collector, regrown basesubmicron collector
scaling speedsmall collector junction
speedthick extrinsic base speedplanar
base-collector junction yield Regrown
submicron emittersubmicron emitter scaling
speedno submicron etching yieldno emitter-base
liftoff yieldlarge emitter contact low Rex,
speedlarge emitter contact yield
monocrystalline where grown on
semiconductorpolycrystalline where grown on
silicon nitride
Approach currently being pursued by D. Scott and
N. Parthasarathy at UCSB
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Evolutionary Approach Optimized InP mesa-HBT
Objectives Improve speed, yield, and
integration density of mesa-HBT
technology Contribute processes for development
of Si-like technology Approach Dielectric
sidewall processesself-aligned base-emitter
junction with improved yield no
liftoff self-aligned definition of base Ohmic
contact width for minimum Cbc Ion implantation
for base pad isolation Extrinsic Cbc
reduction Optimize Ohmic contact metallurgiesRex
reduction essential for high-speed logicSkip
lateral scaling generation with improved base
Ohmics
Emitter contact
Si3N4 Sidewall
SiO2 sidewall
Base contact
Si3N4 Sidewall
Base layer
Collector contact
N- collector
N subcollector
S.I.Substrate
Planar View
Collector contact
Base contact
Emitter contact
Base contact Sidewall
Ion Implant Region
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Research to Date
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Submicron HBTs by Substrate Transfer
Submicron transferred-substrate HBTs with
electron-beam defined emitter and collector
contacts Device measurement and characterization
to 220 GHz G-band (140-220 GHz) small-signal
amplifier designs
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On-wafer Device Measurements
Submicron HBTs have very low Ccb (lt 5
fF) Small reverse transmission characteristics
and small output conductance make accurate device
measurements difficult UCSB measurement set-up
allows device measurements to 220 GHz
Accurate on-wafer calibration is essential LRL
calibration with correction for Line standard
complex characteristic impedance First reported
transistor measurements in 140-220 GHz band 2001
DRC, Notre Dame, IN
Transistor Embedded in LRL Test Structure
UCSB 140-220 GHz VNA Measurement Set-up
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Transferred-Substrate Device Results

• Recent device measurements show singularity in
  Unilateral Power Gain due to small negative
  output conductance
• Not predicted from hybrid-p transistor model
• Cannot extrapolate fmax from device measurements
• Effect may arise from second-order transport
  effects in collector space charge region
• Ccb cancellation
• weak IMPATT effects
• Power gain singularities in Transferred-substrate
  InP/InGaAs-HBTs, submitted to IEEE TED

unbounded U
Emitter 0.3 x 18 ?m2, Collector 0.7 x 18.6
?m2Ic 5 mA, Vce 1.1 V
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Ultra-high Frequency Amplifiers (140-220 GHz)

• Applications
• Wideband communication systems
• Atmospheric sensing
• Automotive radar
• Utilize high available gain of submicron
  transferred substrate HBTs for tuned small-signal
  amplifiers in 140-220 GHz band
• State-of-the-art InP-based HEMT Amplifiers with
  submicron gate lengths
• 3-stage amplifier with 30 dB gain at 140 GHz.
• Pobanz et. al., IEEE JSSC, Vol. 34, No. 9,
  Sept. 1999.
• 3-stage amplifier with 12-15 dB gain from
  160-190 GHz
• Lai et. al., 2000 IEDM, San Francisco, CA.
• 6-stage amplifier with 20 ? 6 dB from 150-215
  GHz.
• Weinreb et. al., IEEE MGWL, Vol. 9, No. 7,
  Sept. 1999.

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First Generation Single-Stage Amplifier

• Measured 6.3 dB peak gain at 175 GHz
• Gain per-stage amongst highest reported
• Common-emitter design with microstrip matching
  network
• Device dimensions
• Emitter area 0.4 x 6 ?m2
• Collector area 0.7 x 6.4 ?m2
• Presented at 2001 GaAsIC Conference

S21
Cell Dimensions 690?m x 350 ?m
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Second Generation Multi-Stage Amplifiers

• Three-stage amplifier designs
• 12.0 dB gain at 170 GHz
• 8.5 dB gain at 195 GHz
• Cascaded 50 W stages with interstage blocking
  capacitors
• To be presented 2002 GaAsIC conference

Cell Dimensions1.6 mm x 0.59 mm
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Technological Implementation
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Evolutionary Approach Optimized InP mesa-HBT
Objectives Improve speed, yield, and
integration density of mesa-HBT
technology Contribute processes for development
of Si-like technology Approach Dielectric
sidewall processesself-aligned base-emitter
junction with improved yield no
liftoff self-aligned definition of base Ohmic
contact width for minimum Ccb Ion implantation
for base pad isolation Extrinsic Ccb
reduction Optimize Ohmic contact metallurgiesRex
reduction essential for high-speed logicSkip
lateral scaling generation with improved base
Ohmics
Emitter contact
Si3N4 Sidewall
SiO2 sidewall
Base contact
Si3N4 Sidewall
Base layer
Collector contact
N- collector
N subcollector
S.I.Substrate
Planar View
Collector contact
Base contact
Emitter contact
Base contact Sidewall
Ion Implant Region
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Technological Implementation

• Optimized Ohmic contacts
• Self-aligned base-emitter junction formation
• Self-aligned base Ohmic width definition
• Ion Implantation for base-pad capacitance
  reduction

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InP HBT Ohmic Contacts
Optimized Ohmic contacts are essential for
realization of high performance mesa-HBTs
Currently UCSB has the worlds best base Ohmic
contacts and the worlds worst emitter Ohmic
contacts Collector contacts have not been closely
examined because of Schottky collector contact
TS-HBTs and the use of thick InGaAs sub-collector
layers
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Base Ohmic Contacts

• Base Ohmic process developed by M.
  Dahlstrom has reduced specific contact
  resistivity of p-type contacts to lt 10-7 W-cm2
• Improvement seen for C and Be doped samples
• Transfer length of lt 0.1 mm allows aggressive
  scaling of base Ohmic contact width for reduced
  Ccb
• Process
• UV Ozone treatment of InGaAs surface
• NH4OH oxide strip
• Pd/Ti/Pd/Au metallization

• Proposed Research
• Incorporate process with new self-aligned
  base-emitter junction processes
• Investigate thermal stability of contacts

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Emitter Ohmic Contacts
UCSB InP HBTs have large extrinsic emitter
resistance Rex Emitter resistance has
contributions from vertical contact resistance,
and resistances of semi-conductor layers.
Approximate as Rex re/Ae UCSB re
30-50 W-mm2 NTT re 7 W-mm2 M. Ida et.
al. 2001 IEDM Variability of UCSB contacts
suggest processing related problems

• Proposed Research
• Optimize Ohmic contacts to n-InGaAs using
  refractory metallization if possible
• Determine source of high emitter resistance and
  optimize epi-layers and/or process to reduce Rex

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Collector Ohmic Contacts
Wmesa
Wc,gap
Wc,gap
In typical mesa-HBT, extrinsic collector
resistance Rc is much smaller than
Rex but Subcollector thickness should be
minimized for device planarity, and for base-pad
capacitance isolation implant, Tsubcollector lt
1500 Ang and, InGaAs should be eliminated from
subcollector for thermal considerations Collector
contacts should be made to thin InP subcollector
regions and Rc will be comparable to Rex
N- collector
N subcollector
S.I.Substrate

• Proposed Research
• Optimize Ohmic contacts to n-InP
• Investigate use of alloyed contacts (i.e.
  AuGe, Pd/Ge)

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Base-Emitter Junction Formation
Current UCSB base-emitter junction formation
relies on undercut of emitter semiconductor and
self-aligned liftoff of thin base metal
Acceptable process for high-performance,
small-scale integration, research
fabrication Unacceptable process for
high-performance, large-scale integration,
production fabrication
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Base-Emitter Junction Formation
Current Base-Emitter Process
Failure Mechanisms
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Dielectric Sidewall Formation
Utilize isotropic deposition of CVD dielectric
films and anisotropic etch rates of RIE to form
sidewall spacers
Emitter Contact/ Mesa formation
CVD Dielectric film
Reactive Ion Etch
Sidewall Formation
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Dielectric Sidewall Formation Current Status
1 mm Tungsten Emitter w/ 1000A SiN sidewall

• Dielectric sidewall process has been developed at
  UCSB
• Utilize dry-etched tungsten emitter contacts for
  improved emitter profile and sidewall formation
• Key challenges
• Etch damage to base semiconductor
• Passivation of InP/InGaAs surfaces with
  dielectrics
• Scaling sidewall thickness
• Hydrogen passivation of carbon doped InGaAs base

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Key Challenge Hydrogen Passivation of C-doped
InGaAs

• Carbon is preferred to Beryllium as base dopant
  because of lower diffusion coefficient and higher
  solubility
• Hydrogen passivation of Carbon acceptors in
  InGaAs is observed in MOCVD growth and during
  Methane base dry-etches
• SixNy CVD deposition utilizes SiH4 carrier gas.
  Carbon passivation during ECR-CVD of SixNy has
  been reported.
• Ren, F et. al. Solid-State Electronics May, 1996
• Possible Solutions
• SixNy deposition on base-emitter grade
• Anneal out hydrogen 400 C 10 min anneal
  requires refractory contacts
• Use Be doped base
• GaAsSb base layer

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InAlAs/GaAsSb/InP DHBTs
Large area DC I-V

• MOCVD of C-doped GaAsSb shows no hydrogen
  passivation
• Initial experiments at UCSB show no passivation
  after SixNy deposition
• High performance InP/GaAsSb/InP DHBTs have been
  demonstrated ft, fmax 300 GHz
• Dvorak, et. al. IEEE EDL Aug. 2001
• InAlAs/GaAsSb/InP HBTs have favorable band lineup
  and good surface properties for BE passivation
• MBE growth of p-type GaAsSb looks promising
• Be NA 6.6E19 cm-3 m 26.6 cm2/Vs
• C NA 4E19 cm-3 m 46 cm2/Vs

GaAs50Sb50
InP
In52Al48As
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Self-aligned base-emitter junction formation

• Approaches to base-emitter junction formation
  with sidewall spacers
• Blanket metallization and planarization etch back
• Selective metallization of base semiconductor
  CVD, or electroplating
• Self-aligned liftoff of thin base metal with
  sidewalls to prevent metal-to-metal short
  circuits

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Base-emitter junction formation Base metal
liftoff
Self-aligned emitter mesa
Sidewall formation
Thin metal liftoff
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Base-emitter junction formation Selective
metallization
CVD
Sidewall Formation
Selective CVD Tungsten ???
Electroplate
Sidewall Formation
Thin seed metal
Electroplate
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Base-emitter junction formation Planarization
etchback
Sidewall Formation
Blanket metallization
Planarization
Etchback
Metal sidewall removal
Strip planarization material
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Planarization etchback experiments

• Similar process is incorporated in Hitachi GaAs
  HBT process
• Reference
• Planarization etch back experiments at UCSB were
  unsuccessful due to non-uniformity of RIE system
• Experiments at Rockwell Science Center look
  better but still work to be done
• Etch selectivity between planarization material
  and Tungsten is a key processing issue
• Proposed Research
• Further experiments at RSC to determine
  feasibility of process
• If unsuccessful, look at alternative
  self-aligned processes

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Self-aligned base Ohmic formation
Base Ohmic transfer length lt 0.1 mm allows for
aggressive scaling of base Ohmic contacts for
reduced Cbc Current self-aligned liftoff process
requires accurate stepper alignment and emitter
topology presents challenges for further scaling
Low yield seen for 0.3 mm base Ohmic width
Utilize sidewall process for base Ohmic
definition
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Self-aligned base Ohmic Process Flow
Outer sidewall formation
Self-aligned metallization
Sidewall thickness determined by thickness of
PECVD deposition Repeatable definition of base
Ohmic width if base metal can be selectively dry
etched Continue process with self-aligned
base-mesa etch Goal Repeatable, high-yield
definition of lt 0.3 mm base metal width
RIE base metal
Self-aligned base Ohmic
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Base-pad Capacitance
Base contact pad represents considerable fraction
of total extrinsic base collector capacitance 34
of total Ccb for current generation ECL logic
transistors with 0.7 mm emitter and 0.5 mm base
Ohmic width operating at 2.5 x 105 A/cm2 Fraction
of total Ccb will increase dramatically as
devices are laterally scaled for reduced Ccb and
vertically scaled for high current density
operation 52 of total Ccb, for next
generation ECL logic transistors with 0.5 mm
emitter and 0.3 mm base Ohmic width operating at
5 x 105 A/cm2
Planar View
Collector contact
Base contact pad
Emitter contact
Base contact
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Base-pad capacitance reduction

• Approaches to reducing extrinsic base pad
  capacitance include
• Lateral undercut of contact region for isolation
• Dielectric refill and planarization of extrinsic
  region
• Ion implantation of extrinsic base region
• Ion Implantation of InP
• Damage implants of light ions in InP tend to
  generate shallow level traps
• Unsuitable for device isolation
• Adequate for base-pad capacitance reduction

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Base-pad capacitance reduction He Implant

• Circuit simulations show sheet resistance gt
  1MW/square is adequate to provide base-pad
  isolation
• Implant experiments with He into 1500 Ang.
  InP sub-collector show sheet resistance of 10
  MW/square
• Projected range of He implant will allow implant
  as first processing step
• Proposed Research
• Transistor fabrication with base-pad isolation
  implant
• Determine minimum implant to device separation
• Explore Fe implant for device isolation pending
  experiments by N. Parthasarathy

Planar View
Implant Region
Cross-section
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Layer Structure for Advanced mesa-HBT
InAs 2E19 Si 200 Å
Emitter cap, InAs for improved contact resistance
InGaAs 1E19 Si 300 Å
Grade 1E19 Si 200 Å
InAlAs 8E17 Si 300 Å
Thin InAlAs emitter
Grade 8E17 Si 233 Å
Grade 2E18 Be 67 Å
InGaAs 8E19 C 300 Å
GaAsSb or Be-doped if necessary
InGaAs 1E16 Si 200 Å
Collector setback layer
Grade 1E16 Si 200 Å
1500 Ang. total collector thickness
InP 2E18 Si 1100 Å
InGaAs 1E19 Si 50 Å
Thin subcollector etch stop
InP 1E19 Si 1500 Å
Subcollector no buffer layer
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Predicted Performance
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State-of-the-art InP mesa-HBTs
NTT ft 341 GHz, fmax 250 GHz 1500 Ang.
collector, high current density 8 x 105 A/cm2,
lateral undercut for base pad isolationM. Ida
et. al. 2001 IEDM SFU ft 300 GHz, fmax 300
GHz GaAsSb base, 2000 Ang. collector, airbridge
contacts for base pad isolation, lateral etch
collector undercut M. Dvorak, et. al. IEEE EDL
Aug. 2001 UCSB ft 280 GHz, fmax
gt450GHz Graded C-doped InGaAs base,
2000 Ang. composite collector, highly-scaled base
Ohmics, no base pad isolation M. Dahlstrom, et.
al. 2002 IPRM
UCSB record fmax mesa-HBT
Figures-of-merit do not tell the whole story
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Mesa-HBTs for Digital Logic
Transistor figures-of-merit do not accurately
predict digital logic speed Time constants
CcbDVlogic/Ic and CcbRex have larger contribution
to digital logic gate delays than to ft UCSB
record 87 GHz static frequency divider fabricated
with ft 200 GHz, fmax 180 GHz device
operating at Je 2.5 x 105 A/cm2 PK
Sundararajan PhD thesis Similarly, MSG/MAG is
better metric for mm-wave tuned amplifier
design than Unilateral power gain used to
extrpolate fmax
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Predicted Performance SPICE Simulations

• Use HBT SPICE model to predict improvements in
  device performance from process enhancements
• Next generation ECL transistor
• We 0.5 mm, Le 3.0 mm, Je 5 x 105 A/cm2,
  Tcollector 1500 Ang, Tbase 300 Ang
• Physical parameters from current generation
  mesa-HBTs
• Consider improvements in
• ft and fmax
• Maximum ECL static divider frequency (no layout
  parasitics)
• Maximum available gain at 175 GHz ( Le 6 mm)

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Predicted Performance Rex Reduction
Base Ohmic width 0.5 mm, Standard base-pad
capacitance
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Predicted Performance Self-aligned base Ohmic
re 30 W-mm2, Standard base-pad capacitance
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Predicted Performance Base-pad Isolation
re 30 W-mm2, Base Ohmic width 0.5 mm
 
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Predicted Performance All Enhancements
re 10 W-mm2, Base Ohmic width 0.25 mm,
Base-pad Isolation
 
8.8 dB with rb_cont 1 x 10-8 W-cm2
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Proposed Circuit Demonstrations
Static Frequency Dividers divide-by-two,
divide-by-four Analog Wideband Amplifiers
Cherry-Hooper mm-Wave Tuned Amplifiers 140-220
GHz frequency band
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Research Timeline
Implement process enhancements using current
device mask set Base pad isolation
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Things to do when SEM Rockwell
experiments More samples for S3 processing at
Rockwell Thicker emitter, thinner base metal
(how thin?) Emitter contact experiments on
remaining InGaAs wafer Literature search on N
InGaAs contacts ---Work function stuff????
Something besides Ti Mask set for Ion Implant of
InP DHBTs for base pad reduction Implant through
whole structure or just base collector??
Measure straggle on bits an pieces of He
implanted structure Layer structures from
Dennis InAs cap on InAlAs for Ohmic contact
studies InAlAs grade on carbon doped InGaAs.
Check for H passivation maybe able to use old
mattias Epi, also for implant stuff. GaAsSb when
system B comes back up!! Order IQE epi. Go See
Val tomorrow!!!