The Project CPEG 324 Reading: XSA-50 Manual DS92LV16 Data Sheet DS92LV16 Design Guide LVDS Owner

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The ProjectCPEG 324Reading XSA-50
ManualDS92LV16 Data SheetDS92LV16 Design
GuideLVDS Owners Manual
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XSA-50 Prototyping Board
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XSA-50 Prototyping Board
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XSA-50 Prototyping Board
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XILINX XC2S50 FPGA

• FPGA used on XSA-50 Proto Board
• 25K 50K Programmable Logic Gates
• 208 Pin Package
• 140 User Definable I/O Pins

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Logic Synthesis Design Flow
In CPEG422, you will write and synthesize VHDL
programs for XSA-50 proto boards.
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Programming XSA-50
Power the board connect parallel cable to PC
run GSXLOAD utility to load .BIT file on FPGA.
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XSA-50 Daughter-Board
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XSA-50 Prototyping Header
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The Project Physical View
The project for this class is to design and
simulate a daughter-board that attaches to the
bed-of-nails connector on the back-side of
XSA-50. The daughter-board implements a gigabit
serial interface using DS92LV16 LVDS SERializer /
DESerializer (SERDES) chip from National
Semiconductor. The external I/O for the
daughterboard consists of 4 SMA connectors
implementing one differential gigabit LVDS input
port and one differential gigabit LVDS output
port (see figure 2). Using this daughterboard
together four SMA cables enables one to implement
a bidirectional gigabit link between two XSA-50
boards. That will be your hardware project in
CPEG422, but we are running a bit ahead of
ourselves.
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The Project Functional View
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LVDS

• Low Voltage Differential Signaling
• Open standard for gigabit signaling
• Two wires transmit signal (positive and negative)
• Current mode signal transmitter
• Voltage mode receiver
• Transmission line wiring (multiple bits in
  flight)
• Controlled impedance traces and termination
  resistors

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LVDS Circuits
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LVDS Standard
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LVDS Applications
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LVDS vs. Others
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LVDS Speed vs. Distance
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PCB Tracks for LVDS
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Bad LVDS PCB Design