Optimization Methods in IC Design

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Optimization Methods in IC Design

• Tino Heijmen
• Philips Research
• MACSI-net workshop Naples, September 2003

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Abstraction levels of IC Design
Picture from Jan Rabaey (Berkeley)
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Why Automated Design Optimization?

• Complexity (circuits and design processes)
• Design times (and redesign times)
• Design metrics in digital circuits
• Timing signal delay in critical paths
• Area
• Power dissipation
• Design metrics in analog circuits
• Various bandwidth, gain, noise figure, etc.,
  etc.
• Specific circuit knowledge required

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What Will I Talk About?

• Optimization of IC design at the circuit (gate)
  level
• Automated design optimization
• Three equation-based approaches
• Two methods based on circuit simulation
• Philips tool Adapt
• Some special topics
• What is there left to do?

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What Will I NOT Talk About?

• Circuit optimization other than at the circuit
  level
• No optimization of architecture
• No optimization of topology (circuit schematic)
• No optimization of cell placement or wire routing
• No inverse problems
• Theory of optimization algorithms
• Derivations of expressions

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Contents

• Introduction
• Equation-based methods
• Geometric programming
• Lagrangian relaxation
• Semi-definite programming
• Simulation-based methods
• JiffyTune (IBM)
• Adapt (Philips)
• Gridmom algorithm (applied in Adapt)
• Special topics future work
• Design centering
• Uncertainty-aware tuning
• Statistical optimization

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Delay in Digital Circuits
Signal
Memory elements

• Combinatorial (sub)circuit different signal
  paths
• Components (gates and wires) variable size xi
  modeled by resistor-capacitance circuits
• Component i has delay Di (also dependent on the
  sizes of down-stream components)

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Geometric Programming Approach (1)

• Geom. progr. minimize f(z) with linear
  constraints
• Extension to problems with posynomial
  constraints
• Generalized Geometric Programming (cj ? 0)
• Key point when formulated as (generalized) GP
  problem, algorithms are available to solve it

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Geometric Programming Approach (2)

• Transform posynomials ? geometric programming
• Bound convex domain by polytope
• Use cutting-plane technique to shrink the
  polytope

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Geometric Programming Approach (3)
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Geometric Programming Approach (2)

• Transform posynomials ? geometric programming
• Bound convex domain by polytope
• Use cutting-plane technique to shrink the
  polytope
• Pro flexible, accurate Con inefficient for
  large N
• Sapatnekar, IEEE TCAD, vol. 11, p. 1621, Nov.
  1993

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Lagrangian Relaxation approach (1)
component delay
Partition constraints on path delay into
constraints on component delay
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Lagrangian Relaxation approach (2)
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Lagrangian Relaxation approach (3)

• Apply optimality conditions to redefineLagrangian
  Relaxation Subproblem (LRS)
• Solve redefined LRS by greedy algorithm
• Find optimal xi while keeping all xk?i fixed
• Adjust ?s by solving the Lagrangian dual
  subproblem
• Sub-gradient optimization method
• Reported by Chen et al. (Univ. Texas), 1999
• Advantages very efficient, applicable to large
  circuits
• Drawbacks only shown for simple delay expressions

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Approach 3 Semi-Definite Programming

• Resistor-capacitor (RC) circuitry use theory of
  linear circuits
• Time constants of circuit defined by conductance
  (GR-1) and capacitance (C) matrices dependent
  on component sizes
• Circuit optimization is cast as SDP problem
• Inclusion of resistor loops and coupling
  capacitances possible ?interesting for special
  circuits in digital design
• L. Vandenberghe and S. Boyd (UCLA/Stanford), 1998

area
all time constants smaller than Tmax
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Contents

• Introduction
• Equation-based methods
• Geometric programming
• Lagrangian relaxation
• Semi-definite programming
• Simulation-based methods
• JiffyTune (IBM)
• Adapt (Philips)
• Gridmom algorithm (applied in Adapt)
• Special topics future work
• Design centering
• Uncertainty-aware tuning
• Statistical optimization

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Approach 4 dynamical tuning (IBM)
Large-scale optimization algorithm
Control
Gradients calculated in a single simulation
Time-domain circuit simulator (fast, simplified)
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Adapt analog design assistance (Philips)

• Do the tedious and time-consuming routine
  workleave the creative part to the (analog)
  designer
• Interactive, allow exploration of a given
  topology
• Applies full numerical circuit simulation
  program
• Accuracy
• Flexibility
• Intended for medium-sized circuits(several tens
  of optimization variables at most)
• Nonlinear constrained optimization algorithm
  (gridmom)

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Adapt functionality
Simulator Functionality
Adapt Functionality
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Equation-based vs. simulation based

• Equation-based
• Time-efficient
• Limited flexibility
• Limited accuracy
• Applied to
• Large digital circuits
• Standard analog topologies
• Examples
• Geometric programming
• Lagrangian relaxation
• Semi-definite programming

• Simulation-based
• Time-consuming
• Flexibility of simulator
• Accuracy of simulator
• Applied to
• Custom digital design
• General analog circuits
• Examples
• JiffyTune (digital, IBM)
• Adapt (analog, Philips)

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Contents

• Introduction
• Equation-based methods
• Geometric programming
• Lagrangian relaxation
• Semi-definite programming
• Simulation-based methods
• JiffyTune (IBM)
• Adapt (Philips)
• Gridmom algorithm (applied in Adapt)
• Special topics future work
• Design centering
• Uncertainty-aware tuning
• Statistical optimization

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Conditions on algorithm for Adapt

• Efficient (low number of evaluations)
• Function evaluation (CPU-intensive) circuit
  simulation
• Derivative-free
• Circuit simulators called by Adapt do not provide
  gradients
• Non-linear
• Objectives and constraints are non-linear
  functions
• Robust
• Results from simulator are inherently noisy
• No numerical estimation of gradients
• Suitable values for parameters (e.g. thresholds)

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Optimization problem
objective function

• Introduce slack variables
• Associated Lagrangian

inequality constraints
variable bounds
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Merit function augmented Lagrangian
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Outline of algorithm
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Subproblem minimize merit function

• Based on algorithm of C. Elster and A. Neumaier
• Trust-region method with successively refined
  grids
• Three phases
• Starting phase
• Hooke-Jeeves pattern-based optimization
  algorithm
• Uniform Design (K.T. Fang et al.) distribution
  method
• Descent phase
• Construction quadratic approximation function
  q(x), (least-squares fit to a selection of
  previous evaluation points)
• Minimize q(x) using a trust-region method
• Refinement-check phase refining grid?
• After phase 1, alternatingly phases 2 and 3 are
  performed

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Design example bandpass filter
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Contents

• Introduction
• Equation-based methods
• Geometric programming
• Lagrangian relaxation
• Semi-definite programming
• Simulation-based methods
• JiffyTune (IBM)
• Adapt (Philips)
• Gridmom algorithm (applied in Adapt)
• Special topics future work
• Design centering
• Uncertainty-aware tuning
• Statistical optimization

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Design centering of analog ICs (1)

• Gräb et al. (TU München)
• Circuit sizing can be applied to
• Nominal design
• Without inclusion of parameter variations
• Optimization of performance for a given set of
  operation conditions
• Design centering
• Include process variations (e.g., oxide
  thickness, threshold voltage, substrate doping)
• Optimization of parametric yield

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Design centering of analog ICs (2)
d0 design parameters (transistor widths,
capacities) s0 statistical parameters (oxide
thickness, substrate doping) ?w worst-case
operational parameters (temperature, supply
voltage)
Pictures from Helmut Gräb (TU München)
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Design centering of analog ICs (3)
Boundary due to circuit specification(for a
given set of design parameters)
Picture from Helmut Gräb (TU München)
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Design centering of analog ICs (4)
Design centering sub-optimal performance,
butoptimal parametric yield (for all design
constraints)
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Uncertainty-Aware Optimization
Pre-optimization Nominal optimization Uncertaint
y-aware optimization
paths
time margin

• Optimization results in wall of equally
  critical paths
• But uncertainties (model, process vars.) are
  neglected!
• Add penalty to avoid a steep vertical wall (with
  little cost)
• Better performance (Monte Carlo)
• More effective optimization (less degeneracy)
• Visweswariah et al (IBM), DAC2002

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Ongoing/future work

• Interconnect (wiring) becomes increasingly
  important
• Physically knowledgable synthesis (and
  optimization)
• Parallel wires have coupling capacitances ?
  cross-talk
• Smaller feature sizes, cross-talk? noise
• Optimize signal integrity
• Construction of model functions for design
  metrics
• Fitting to data from circuit evaluations
• Application in design space exploration, e.g.,
  design centering
• Optimization of combined digital and analog
  circuitry
• Circuit simulator applied in optimization
• Provide gradients
• Preferably low noise level

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Statistical optimization (digital circuits)

• Smaller feature sizes ? process variations
• Statistical static timing analysis desirable
• Probability distribution preferred over
  worst-case value
• Statistical timing
• Ch. Visweswariah (IBM), Proc. DAC 2003
• How to apply optimization to statistical timing?

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Summary

• Automated circuit sizing important in IC design
• Equation-based and simulation-based approaches
• Tool Adapt full numerical simulation, nonlinear
  constrained optimization
• Gridmom algorithm developed for Adapt
• Augmented Lagrangian merit function
• Grid-based trust-region approach to minimize
  merit function
• Topics for future research

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Backup transparancies
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Some details of gridmom algorithm

• Termination conditions (Karush-Kuhn-Tucker)
• Update multipliers
• Update penalty factors multiply by fixed
  incremental factor if reduction in constraint
  violation is not sufficient

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Min. merit function trust-region approach
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Minimization of the merit function

• Starting phase perform a number of evaluations
• Initialize trust-region radius ? and reference
  point x
• Construct quadratic approximation function
• Minimize q(x) within trust-region B
• Evaluate true merit function at minimum of q(x)
• Convergence test
• Update trust-region radius ? and reference point
  x
• Go to 3

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Minimize merit function some details

• Use of successively refined grids
• prevention of preliminary clustering of
  evaluation points
• labelling of evaluation points
• Reuse of evaluation points
• when minimizing merit function ?(k), function
  values from previous iterations are used to
  construct approximation function
• Termination tests based on N best evaluation
  points
• On function values
• On variables

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Simple 2D example Rosenbrock

• Gridmom 88 evals.
  Nelder-Mead 210 evals.

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Design centering of analog ICs (2)
d design parameters s statistical
parameters ?w operational parameters (worst case)
Pictures from H. Gräb
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Design centering of analog ICs (3)
Pictures from H. Gräb