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Computer Engineering Research Teaching

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Title: Computer Engineering Research Teaching


1
Computer EngineeringResearch Teaching
  • S. Vassiliadis
  • ITS
  • Electrical Engineering
  • TU Delft

Intel April 99
2
Outline
  • General information
  • Teaching
  • Research

3
Computer Engineering Analysis of data
processing requirements for electronic data
processing units and systems and the design
(synthesis) of their architecture, implementation
and realization.
What Does It Really Mean?
Architecture ?
Determine the function to perform
Implementation ?
Establish a method to achieve the function
Realization ?
Use available means to materialize the method
4
Computer Engineering Interests
5
Current Group Formation
6
Research Financing 94-98 (in Kfl)
Total financing 6000 Kfl
7
Scientific Results (94-98)
  • Degrees
  • PhD Theses................................ 9
  • Eng. Degrees.............................. 5
  • MSc............................................ 87
  • Publications
  • Books/Chapters.......................... 7
  • Journal Papers............................ 47
  • Conference Papers..................... 165
  • Patents........................................ 50

8
Industrial Academic Impact
  • 5 Start-ups
  • Hardware
  • IBM AS400 mod 400, 500, 501, 405, 505
  • IBM Advanced 36
  • IBM s/390 G4 G5
  • Motorola/Apple/IBM PowerPC 603e, 604e
  • Motorola/Apple/IBM 750
  • MWAVE 3780i DSP
  • Motorola Activec Multimedia
  • Spase Nijmegen
  • TNO-FEL MOVE
  • Software
  • Un. of Amsterdam
  • Un. of Utrecht
  • TNO
  • Indian Institute of Science
  • Philips Research
  • OCE
  • NEC (Princeton Research)
  • Expressed Interests
  • HP
  • GDM
  • Nokia

9
Education
  • Undergraduate Courses
  • Logic Design
  • Computer Programming
  • Computer Architecture I
  • Interpretation of Computer Programs
  • Microprocessors
  • Computer Architecture II
  • Graduate Courses
  • Computer Architecture III
  • Logic Design II
  • Performance Analysis
  • Instruction Level Parallelism
  • Embedded System Design

10
Research Projects
MOLEN Embedded system architecture,
multimedia, java. MOVE Embedded system
synthesis, compilers, hardware software
co-design. PAMELA Performance analysis and
languages. D-ILIAD Computer architecture,
implementation, computer arithmetic, switches.
11
Embedded Systems
  • Facts
  • Billions of embedded Systems sold anually
  • Most embedded processor have special requirements
    (Performance, Cost, Functionality, Power...)
  • Processing is heterogeneous
  • Short design cycles for rapid requirement changes
  • Conclusions
  • Pay special attention to shifting paradigms
  • Fast technology transfer to industry
  • Our involvement
  • 2 Projects (MOLEN, MOVE) for embedded systems

12
MOLENEmbedded System Design
  • Topics
  • Processor Embedded Architecture
  • Multimedia
  • Java
  • Embedded System Tools
  • Embedded Agents
  • Current Contributions
  • Java Processor
  • Multimedia Instructions
  • Specialized Units
  • FPGA Units
  • Future Directions
  • Parametrical heterogeneous Embedded Systems

13
MOLEN Multimedia Instruction Set Example Motion
Estimation Problem Compute
  • Observations
  • Vector is subword parallel but execution serial
  • Vector instructions are too simple

14
The MOLEN Solution (Euromicro 98)
  • Characteristics new Instructions
  • Streamed data
  • ? Autorepeat loading (a chunk at time) ? ALOAD
  • Single result from a 16x16 stream
  • ? single multiple data reduction instruction ?
    SAD

Implementation issues ALOAD lt
autodecrement branch SAD lt CC determination
multiplication SAD Step 1 Determine
AiltBi 1 cycle
Step 2 Invert smaller to fit multiplier tree 0
cycles Step 3 Multiply -Add Accumulate
2 cycles
New Program ALOAD A,B SAD A,B,C
Our Example 16x16 data 19 cycles!
15
Results
  • Improvements
  • Code Reduction (2 instead of 6 instructions )
  • Scalable Implementation
  • Improved Performance from to 112 to 19
    execution cycles
  • Best performance for the loop (1 cycle load all)
    is 5 cycles
  • Additions
  • 2 new instructions
  • An 5 increase in hardware for multiplier a
    trivial counter

16
MOVE
Semi-automatic generation of application specific
processors
17
MOVE
  • Current Contributions
  • Transport triggered architecture
  • Operational design framework (add any unit you
    like, no restrictions)
  • Several cheap designs (data logger,
    video-enhancher, MPEG-decoder, wireless
    communications)
  • Future Directions
  • Tune your application to suit your processor
  • System design
  • Multiprocessor TTA
  • Low-power processors

18
PAMELAPerformance Analysis of Computer Systems
  • Current Contributions
  • Specialized Languages
  • Simulation Tools Methodology
  • Parallel Algorithms
  • Delft Architecture Workbench
  • Future Directions (immediate)
  • Coplete the Delft Architecture Workbench

19
D-IliadHigh Performance General Purpose Computers
  • Topics
  • Uni Multiprocessors
  • Internet Processing
  • Computer Design
  • High Speed Switches
  • Current Contributions
  • Instruction level parallel machines (Superscalar,
    SCISM)
  • New Complex Instructions
  • New Designs of Arithmetic Processing
  • New Switch Design
  • Future Directions
  • New Architectural paradigm
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