Introduction to SPWG Notebook Panel Specification Version 3'0 February 18, 2004

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Introduction to SPWG Notebook Panel Specification
Version 3.0February 18, 2004

• By CHIH-FU HSU
• 3/11/2005

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Outline

• Introduction
• Reference
• Sizes, Resolutions, Aspect Ratio
• Mechanical Properties
• Electrical Interface

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Introduction

• What is SPWG?
• Standard Panel Working Group
• was formed to establish a set of standard LCD
  panels with dimensions and interface
  characteristics that allow both notebook and LCD
• Who had endorsed by SPWG
• AU Optronics,BOE/Hydis, Chi Mei, CPT, HannStar,
  Hitachi, IDTech, InnoLux, LG.Philips LCD,
  Mitsubishi, Quanta Display, Samsung, Sharp,
  Toppoly, Tottori Sanyo, and TMDisplay

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Reference

• VESA Display Data Channel Standard, DDC2B
• VESA Enhanced Extended Display Identification
  Data
• VESA Flat Panel Display Measurement Standard,
  version 2.0
• Philips I2C Bus Specification Data Handbook I2C
  Peripherals for Microcontrollers
• TIA/EIA-644 Electrical Characteristics of Low
  Voltage Differential Signaling (LVDS) Interface
  Circuits
• Intel Common Panel Interface Specification, Nov.
  2002, version 1.5.
• VESA file at www.vesa.org , FPDMSU.ppt
• VESA Coordinated Video Timing Generator, revision
  1.1, April 9, 2003

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Sizes, Resolutions, Aspect Ratio
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Mechanical Properties
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Electrical Interface

• Connectors Pin-Outs
• I/O Connector (HRS) DF19L-20P-1H or equivalent
  (1 Channel LVDS)
• I/O Connector (JAE) FI-Xx30Sx-HFxx or equivalent
  (2 Channel LVDS)
• Signal Timing
• Notebook signal timing is 18 bit as defined VESA
  Coordinated Video Timing Generator, revision 1.1,
  April 9, 2003, with reduced blanking.

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Electrical Interface

• LVDS Data and Control Signal Interface
• Single Channel LVDS Data Mapping (18bpp) 20-Pin
  Connector
• Single Channel LVDS Data Mapping (18bpp) 30-Pin
  Connector
• Dual Channel LVDS Data Mapping (18bpp) 30-Pin
  Connector
• Active Area Pixel Layout

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Electrical Interface

• EDID
• Enhanced Extended Display Identification Data
• data format to support displays as defined in the
  VESA Plug Display.
• Panel Power Sequence
• Panel Backlight Interface

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1 Channel LVDS
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2 Channel LVDS
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Single Channel 20-Pin Connector
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Single Channel 30-Pin Connector
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Dual Channel 30-Pin Connector
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Active Area Pixel Layout
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Panel Power Sequence
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Panel Backlight Interface
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Thanks your attendance

• e-mail cfhsu.iod93g_at_nctu.edu.tw