EET 3350 Digital Systems Design

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EET 3350 Digital Systems Design

• Wakerly Chapter 7

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Agenda for Today

• Synchronous Sequential Machines
• Basic Concepts
• Parity Checker Example
• Sequential Circuit Analysis
• Overview, reminder
• Sequential Circuit Design
• Five more examples to illustrate the design
  process

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Synchronous Sequential Machines

• An example that illustrates some basic concepts
  for synchronous sequential circuits.

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Synchronous Sequential Circuit Specification
Example Odd Parity Checker
Assert output1 whenever input bit stream has odd
number of 1's
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Synchronous Sequential Circuit States
Example Odd Parity Checker
Assert output1 whenever input bit stream has odd
number of 1's
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Synchronous Sequential Circuit Memory

• Flip-Flop Excitation Tables
• You can use any FF type for implementation
• Flip-Flop types can be mixed
• i.e., for a two flip-flop circuit, you could use
  a JK FF for Q1 and a T FF for Q0

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Synchronous Sequential Circuit Implementation
Example Odd Parity Checker
Next State Function
Output Function
NS PS xor PI
Output PS
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Synchronous Sequential Circuit Timing

• Timing Diagrams
• Show when inputs are sampled, next state computed
  and outputs asserted
• State Time
• The time between clocking events
• Usually, the clock period
• Clocking event causes state/outputs to
  transition, based on current inputs
• Set-up and hold time considerations
• Inputs should be stable before clocking event
• After propagation delay
• Next State is entered and new Outputs are stable

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Synchronous Sequential Circuit Timing
Example Positive Edge Triggered Synchronous
System

• On rising edge, inputs sampled outputs, next
  state computed
• After propagation delay, outputs and next state
  are stable
• Immediate Outputs
• effective immediately
• could cause inputs from datapath to change
• Delayed Outputs
• take effect on next clock edge
• propagation delays must exceed hold times

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Synchronous Sequential Circuit Timing
Typical Timing Specifications Flipflops vs.
Latches
74LS74 Positive Edge Triggered D Flip-Flop
Setup time Hold time Minimum clock
width  Propagation delays (low to high, high
to low, max and typical)
All measurements are made from the clocking
event that is, the rising edge of the clock
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Synchronous Sequential Circuit Master Clock
Communicating State Machines
One machine's output is another machine's input
Machines advance in lock step Initial
inputs/outputs X 0, Y 0
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Moore vs. Mealy Machines
Asynchronous Output Changes
Moore Machine Outputs are function solely of the
current state Outputs change synchronously
with state changes
Mealy Machine Outputs depend on state AND
inputs Input change can cause an immediate
(asynchronous) output change
Mealy only no connection for Moore
X Inputs
State Register
Combinational Logic for Next State (FF Inputs)
Comb. Logic for Outputs)
Z Outputs
State Feedback
Clock
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Moore and Mealy Machines
Synchronous Mealy Machine with Pipelined Outputs
X Inputs
State Register
Output Register
Combinational Logic for Next State (FF Inputs)
Comb. Logic for Outputs)
Z Outputs
State Feedback
Clock
Clock
Latched state AND outputs Avoids glitchy
outputs! Outputs are delayed by up to 1 clock
period Usually equivalent to the Moore form
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Moore and Mealy Machines
State Diagram Equivalents
Moore Machine
(N D Reset)/0
Mealy Machine
N D Reset
Reset
Reset/0
0
0
0
Reset
Reset/0
N
N/0
5
5
D/0
D
0
N D/0
N
N/0
10
10
D/1
N D/0
0
ND
ND/1
15
15
Reset/1
Reset
1
Outputs are associated with State
Outputs are associated with Transitions
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Moore and Mealy Machines
States vs. Transitions
Mealy Machine typically has fewer states than
Moore Machine for same output sequence
Same I/O behavior Different of states
Different output values on transition to the same
state
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Sequential Circuit Analysis

• The reverse engineering process for a
  sequential circuit. Starting with the circuit and
  ending with the state diagram. Motivation Can
  result is a simpler circuit.

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Sequential Circuit Analysis

• Start with schematic diagram
• Need to determine how circuit works
• Trace schematic, determine equations of operation
• FF input equations
• sequential circuit output equations
• Create State transition table
• Sequential circuit inputs, FFs are combinational
  logic inputs
• Organize truth table as current state (FFs) and
  inputs
• Create FF input, sequential Circuit output
  columns
• From FF characteristic Tables, determine FF next
  state values

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Sequential Circuit Analysis

• Generate State Diagram
• Circles (nodes) represent current or present
  state values
• Lines (arcs) represent how state and output
  values change
• Given the current state and current inputs, the
  next state and output values are indicated by the
  associated arc
• State diagram can have different forms depending
  on the type of sequential circuit output

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Sequential Circuit Analysis

• Determine an alternate circuit implementation
• Reduce number of states, if able
• Possibly, use different type of Flip-Flops as
  memory elements
• Optimize combinational logic elements
• Convert between Mealy and Moore implementations
  if able

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Sequential Circuit Design

• Five examples that illustrate the design process.
  Some parts of the process allow for creativity,
  others are routine, cook-book.

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Basic Design Approach

• Six Step Process
• 1. Understand the statement of the Specification
• 2. Obtain an abstract specification of the SSC
• 3. Generate State Table
• 4. Perform state assignment
• 5. Choose FF types to implement SSC state
  register
• 6. Implement the SSC

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Vending Machine Example
General Machine Concept
deliver package of gum after 15 cents
deposited single coin slot for dimes,
nickels no change
Step 1. Understand the problem
Draw a picture!
Block Diagram
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Vending Machine Example
Step 2. Map into more suitable abstract
representation
Tabulate typical input sequences
three nickels nickel, dime dime, nickel two
dimes two nickels, dime
Draw state diagram
Inputs N, D, Reset Output Open
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Vending Machine Example
Step 3 State Minimization
reuse states whenever possible
Symbolic State Table
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Vending Machine Example
Step 4 State Encoding
Inputs
State 0 5 10 15
0 0 0
0 0 0
0 0 0
1 1 1
1 1 1
0 0 0
1 1 1
1 1 1
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Vending Machine Example
Step 5. Choose FFs for implementation
D FF easiest to use
8 Gates
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Vending Machine Example

• Sequential design with D-FFs is easy next state
  depends on D input only
• We can use other FFs but the process is a little
  more involved
• State table defines set of present state to next
  state transitions
• What we need to design the next state
  combinational logic is the FF input values needed
  for each Q ? Q transition
• This table is known as the FF excitation table
• Derived from the FF characteristic table

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Vending Machine Example
Derivation of JK Excitation Table
JK Excitation Table
JK Characteristic Table
J 0 0 0 0 1 1 1 1
K 0 0 1 1 0 0 1 1
Q 0 1 0 1 0 1 0 1
Q 0 1 0 0 1 1 1 0
Q 0 1 0 1
Q 0 0 1 1
J 0 1 X X
K X X 1 0
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Vending Machine Example
Flip-Flop Excitation Tables
Q 0 1 0 1
Q 0 0 1 1
J 0 1 X X
K X X 1 0
S 0 1 0 X
R X 0 1 0
T 0 1 1 0
D 0 1 0 1
You can use any FF type for your
implementation FF types can be mixed I.e. in
vending machinge you could use a JK FF for Q1 and
a T FF for Q0
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Vending Machine Example
Step 5. Choosing FF for Implementation
J-K FF
Inputs
JK Excitation Table
Q 0 1 0 1
Q 0 0 1 1
J 0 1 X X
K X X 1 0
Remapped encoded state transition table using JK
excitation table
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Vending Machine Example
Implementation
J1 D Q0N K1 0 J0 N Q1D K0
Q1N
7 Gates
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Vending Machine Example
J-K Flip-Flops
D Flip-Flops
7 Gates
8 Gates
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Finite String Recognizer Example
Finite String Pattern Recognizer
A finite string recognizer has one input (X) and
one output (Z). The output is asserted whenever
the input sequence 010 has been observed, as
long as the sequence 100 has never
been seen. Step 1. Understanding the problem
statement Sample input/output
behavior
X 00101010010 Z 00010101000 X
11011010010 Z 00000001000
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Finite String Recognizer Example
Finite String Pattern Recognizer
Step 2. Draw State Diagrams for the strings that
must be recognized. i.e., 010 and
100.
Reset
S0 /0
1
Moore State Diagram Reset signal places
circuit in S0
0
S1 /0
S4 /0
0
1
S2 /0
S5 /0
0
0
0,1
S3 /1
S6 /0
Loops in State
Outputs 1
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Finite String Recognizer Example
Finite String Pattern Recognizer
Reset
S0 /0
1
0
Exit conditions from state S3 (have recognized
010) if next input is 0 then we have
0100! (state S6) if next input is 1 then
we have 0101 01 (state S2)
S1 /0
S4 /0
0
1
S2 /0
S5 /0
0
0
1
0,1
S3 /1
S6 /0
0
Loops in State
Outputs 1
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Finite String Recognizer Example
Finite String Pattern Recognizer
Reset
S0 /0
1
0
Exit conditions from S1 recognizes strings
of form 0 (no 1 seen), loop back to S1 if
input is 0 Exit conditions from S4
recognizes strings of form 1 (no 0 seen),
loop back to S4 if input is 1
0
1
S1 /0
S4 /0
0
1
S2 /0
S5 /0
0
0
1
0,1
S3 /1
S6 /0
0
Loops in State
Outputs 1
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Finite String Recognizer Example
Finite String Pattern Recognizer
Reset
S0 /0
S2 01 If next input is 1, then string
could be prefix of (01)1(00), S4 handles just
this case! S5 10 If next input is 1,
then string could be prefix of (10)1(0), S2
handles just this case!
1
0
0
1
S1 /0
S4 /0
1
0
1
S2 /0
S5 /0
1
0
0
1
0,1
S3 /1
S6 /0
0
Loops in State
Outputs 1
Final State Diagram
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Finite String Recognizer Example
Finite String Pattern Recognizer
Review of the Process (so far)
Write down sample inputs and outputs to
understand specification Write down
sequences of states and transitions for the
sequences to be recognized Add
missing transitions reuse states as much as
possible Verify I/O behavior of your state
diagram to insure it functions like the
specification
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Finite String Recognizer Example
Finite String Pattern Recognizer
Remaining Steps
How many Flip-Flops do we need? How many
digits in state label? State assignment
(pick binary labels for each state) Create
state table and state transition table
Determine Next State and Output functions
Draw circuit implementation
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Complex Counter Example
Complex Counter
A synchronous 3-bit counter has a mode control M.
When M 0, the Counter counts up in the binary
sequence. When M 1, the counter advances
through the Gray code sequence. Binary 000,
001, 010, 011, 100, 101, 110, 111 Gray 000,
001, 011, 010, 110, 111, 101, 100 Block Diagram
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Complex Counter Example
Complex Counter
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Complex Counter Example
Complex Counter
One state for each output combination. Add
appropriate transition arrows for the mode
control values.
S0 /000
0,1
0
S1 /001
S7 /111
0
1
0,1
1
1
S2 /010
S6 /110
1
0
0
1
1
S3 /011
S5 /101
S4 /100
0
0
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Complex Counter Example
Complex Counter
Remaining Steps
How many Flip-Flops do we need? Create
state table and state transition table
Determine Next State and Output functions
Draw circuit implementation
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Traffic Light Controller Example
Traffic Light Controller
A busy highway is intersected by a little used
farmroad. Detectors C sense the presence of cars
waiting on the farmroad. With no car on
farmroad, lights remain green in highway
direction. If vehicle on farmroad, highway
lights go from Green to Yellow to Red, allowing
the farmroad lights to become green. These stay
green only as long as a farmroad car is detected
but never longer than a set interval. When
these are met, farmroad lights transition from
Green to Yellow to Red, allowing highway to
return to green. Even if farmroad vehicles are
waiting, highway gets at least a set interval as
green. Assume you have an interval timer that
generates a short time pulse (TS) and a long time
pulse (TL) in response to a set (ST) signal.
TS is to be used for timing yellow lights and TL
for green lights. Note The interval timer is
just another sequential circuit!
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Traffic Light Controller Example
Traffic Light Controller
Diagram of Highway/Farmroad Intersection
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Traffic Light Controller Example
Traffic Light Controller
Tabulation of Inputs and Outputs
Input Signal reset C TS TL Output Signal HG, HY,
HR FG, FY, FR ST
Description place SSC in initial state detect
vehicle on farmroad short time interval
expired long time interval expired Description as
sert green/yellow/red highway lights assert
green/yellow/red farmroad lights start timing a
short or long interval
Tabulation of Unique States Some light
configuration imply others
Description Highway green (farmroad red) Highway
yellow (farmroad red) Farmroad green (highway
red) Farmroad yellow (highway red)
State S0 S1 S2 S3
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Traffic Light Controller Example
Traffic Light Controller
Compare with state diagram
S0 HG, FR S1 HY, FR S2 FG, HR S3 FY, HR
Note This sequential circuit has both Mealy and
Moore outputs!
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Traffic Light Controller Example
Traffic Light Controller
Remaining Steps
How many Flip-Flops do we need? How many
digits in state label? State assignment
(pick binary labels for each state) Create
state table and state transition table
Determine Next State and Output functions
Draw circuit implementation
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Digital Combination Lock Example
Digital Combination Lock
3-bit serial lock controls entry to locked room.
Inputs are RESET, ENTER, two-position switch for
1-bit of key data. Circuit generates an UNLOCK
signal when 3-bit key matches internal
combination. ERROR light illuminated if key does
not match combination. Sequence is (1) Press
RESET, (2) enter key bit, (3) Press ENTER, (4)
repeat (2) and (3) two more times.
Problem specification is incomplete how do
you set the internal combination? exactly
when is the ERROR light asserted? Make
reasonable assumptions hardwired into next
state logic vs. stored in internal register
assert as soon as error is detected vs. wait
until full combination has been
entered Our design registered combination plus
error after full combination
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Digital Combination Lock Example
Digital Combination Lock
Understanding the problem draw a block diagram
Operator Data
Stored Combination
Outputs Unlock Error
Inputs Reset Enter Key-In L0, L1, L2
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Digital Combination Lock Example
Digital Combination Lock
Note that each key entry is really a two-step
process 1. Wait for the enter key 2. Check if
correct key was selected
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Digital Combination Lock Example
Reset Enter
Digital Combination Lock
Reset
Start
Reset Enter
Comp0
KI L0
KI ? L0
Enter
Enter
Idle0
Idle0a
Enter
Enter
Comp1
Error1
KI ? L1
KI L1
Enter
Enter
Idle1
Idle1a
Enter
Enter
Error2
Comp2
KI ? L2
KI L2
Reset
Error3
Done
Reset
Error
Unlock
Reset
Reset
State Diagram
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Assignment

• Finish the design for examples 2, 3, 4 and 5 from
  this lesson