EET 3350 Digital Systems Design Textbook: John Wakerly Chapter 9: 9.1

1
EET 3350 Digital Systems Design Textbook John
Wakerly Chapter 9 9.1

• Memory
• Read-Only Memory ROM, PROM, EPROM

2
Agenda

• Memory
• Definition
• Hierarchy
• Organization
• Applications
• Types of Memory Chips
• Read Only Memory Variations
• ROM
• PROM
• EPROM
• EEPROM
• ROM Applications

3
Memory

• Memory data storage
• memory stores data electronically for rapid
  retrieval
• When most people refer to memory, they are
  talking about the main memory of a computer
• also called random access memory (or RAM)
• However, memory chips of varying types (e.g.,
  ROM, PROM) are integrated into just about every
  electronic device you can think of

3
4
Memory

• Some applications for Memory
• Personal Computers
• Microprocessors
• Embedded Systems
• Public telephone systems
• Compact disc players
• Cell phones
• Games
• PDAs
• Vending machines
• iPODs
• Industrial process controllers
• Digital cameras

• Coffee makers
• Microwaves
• Network routers
• Wireless access points
• Broadband modems
• Answering machines
• CNC Machines
• Medical instruments
• Data acquisition devices
• Network switches
• Digital hearing aids
• Graphing calculators

and many more!
5
Memory

• Sequential circuits all depend upon the presence
  of memory
• A flip-flop can store one bit of information
• A register can store a single word
• typically 32 or 64 bits
• Memory stores a large number of words
• Memory stores this large amounts of data using
  two primary device types
• Read Only Memory (ROM, PROM, EPROM, EEPROM)
• Random Access Memory (RAM)
• Static RAM (SRAM)
• Dynamic RAM (DRAM)

6
Memory

• You can think of memory as being one big array
  (list) of data
• The address serves as an array index
• Each address refers to one word of data (e.g.,
  8-bits, 16-bits, etc.)
• You can read (or modify) the data at any given
  memory address, just like you can read (or
  modify) the contents of an array at any given
  index

7
Computers and Memory

• One view of a simple computer is the block
  diagram of major components shown below
• Memory is one of those major components
• It communicates with the other major components

8
Computers and Memory

• Another view is to look at the signals exchanged
  by the major components
• Memory signals include those shown below

9
Memory

• Memory signals fall into three groups
• Address bus - selects one of many memory
  locations
• Data bus -
• Read (ROM/RAM) the selected locations stored
  data is put on the data bus
• Write (RAM) The data on the data bus is stored
  into the selected location
• Control signals - specifies what the memory is to
  do
• Control signals are usually active low
• Most common signals are
• CS Chip Select must be active to do anything
• OE Output Enable active to read data
• WR Write active to write data

10
Memory

• Memory is not a single chip (device)
• Made up of many identical or similar devices
• A specific device (part of memory) is selected by
  control signals and the address lines (bus)
• All devices are connected to the same bus, and
  see the signals at the same time

11
Memory

• Memory Connection to CPU
• RAM and ROM chips are connected to a CPU through
  the data and address buses
• The low-order lines in the address bus select the
  byte within the chips and other lines in the
  address bus select a particular chip through its
  chip select inputs

12
Memory

• Memory Connection to CPU
• Illustrates the use of both RAM and ROM in the
  same memory space
• Shows the utility of chip-select inputs
• Shows creative use of address lines

13
Memory

• Location - the smallest selectable unit in memory
• Has 1 or more data bits per location
• All bits in location are read/written together
• Cannot manipulate single bits in a location
• For k address signals, there are 2k locations in
  a memory device
• Each location contains an n-bit word
• Memory size is specified as
• loc x bits per location
• 224 x 16 RAM - 224 16M words, each 16 bits long
• 24 address lines, 16 data lines
• bits
• The total storage capacity is 224 x 16 228 bits

14
Memory

• Memory sizes are usually specified in numbers of
  bytes (1 byte 8 bits)
• The 228-bit memory on the previous page
  translates into
• 228 bits / 8 bits per byte 225 bytes
• With the abbreviations below, this is equivalent
  to 32 megabytes

15
Memory

• Non-volatile
• If un-powered, its content is retained
• Read-only
• normal operation cannot change contents
• k-bit ADRS specifies the address or location to
  read from
• A Chip Select, CS, enables or disables the
  RAM/ROM
• An Output Enable, OE, turns on or off tri-state
  output buffers
• Data Out will be the n-bit value stored at ADRS

?
16
Memory

• Content loading (programming) done many ways
  depending on device type
• ROM mask programmed, loaded at the factory
• hardwired - cant be changed
• embedded mass-produced systems
• PROM OTP (One Time Programmable), programmed by
  user, using an external programming device
• EPROM reusable, erased by UV light, programmed
  by user, using an external programming device
• EEPROM electrically erasable, clears entire
  blocks with single operation, programmed in-place
  (no need to remove from circuit board)

17
Memory

• ROMs are useful for holding data that never
  changes
• Arithmetic circuits might use lookup tables to
  speed up computations of logarithms or divisions
• Many computers use a ROM to store important
  programs that should not be modified, such as the
  system BIOS
• Application programs of embedded systems, PDAs,
  game machines, cell phones, vending machines,
  etc., are stored in ROMs
• Configuration files for programmable logic
  devices

key concept non-volatile
18
Computers and Memory

• The technology used for computer memory is
  defined by role

19
Memory

• Characteristics of various memory device types

20
Memory Hierarchy

• Memory Hierarchy is
• a technique of using a variety of storage devices
  
• in a manner that results in the highest possible
  access speed
• while minimizing the total cost of the memory
  system

many ways to visualize
21
Memory Hierarchy

• In a typical computer system, the storage system
  is organized according to the following hierarchy

fast access (1-20 ns) and small capacity (1-4K
byte)
decreasing cost/bit
decreasing access time
slow access (1-10 s) and large capacity (almost
unlimited)
(Relative) size of the memory at each level
22
Memory Hierarchy

• Another view of the hierarchy that focuses on the
  distance from the processor (in terms of access
  time) is shown below

Processor
Control Unit
Secondary Storage (Disk)
Main Memory (DRAM)
Second Level Cache (SRAM)
Datapath
On-Chip Cache
Registers
10,000,000ns (10s ms)
0.5ns
Speed (ns)
6-10ns
100ns
10,000,000,000ns (10s sec)
1-2ns
Ks
100s
Gs
Size (bytes)
Ks
Ms
Ts
23
Memory Hierarchy

• This view of memory hierarchy includes an
  indication of the typical sizes for the various
  elements

24
Memory Hierarchy

• Recall that main memory is not a single
  technology
• The others are almost always a single technology

25
Read-Only Memories

• Definition
• ROM consists of an array of semiconductor devices
  interconnected to store an array of memory data.
• Data can only be read, it cannot be changed under
  normal operating conditions.
• Types of ROM
• Mask programmable ROM (at the factory)
• Field-Programmable ROM (PROM)
• UV-Erasable and re-Programmable ROM (EPROM)
• Electrically-Erasable and re-Programmable ROM
  (EEPROM)
• Flash

26
Read-Only Memories

• The way a ROM chip works necessitates the
  programming of complete data when the chip is
  created.
• You cannot reprogram or rewrite a standard ROM
  chip.
• If it is incorrect, or the data needs to be
  updated, you have to throw it away and start
  over.
• Creating the original template for a ROM chip is
  often a laborious process. 
• Once the template is completed, the actual chips
  can cost as little as a few cents each.
• They use very little power, are extremely
  reliable and, in the case of most small
  electronic devices, contain all the necessary
  programming to control the device.

26
27
Read-Only Memories

• Basic ROM structure, a simplified view
• Address input lines decoder to select desired
  location
• Data storage array
• Data output lines parallel, perhaps buffered

28
Read-Only Memories

• The logic symbol below is used in circuit
  diagrams
• Focus is on the basic structure of a ROM
• A combinational logic circuit

29
ROM

• Data is stored in a ROM by breaking or preserving
  connections
• using a diode, transistor or fuses

0 0 0
0 1 0
0 0 1
29
30
Todays ROMs

• 256K bytes, 1M byte, or larger
• Use MOS transistors in place of diodes

31
PROM

• PROMs can only be programmed once
• They are more fragile than ROMs
• a jolt of static electricity can cause fuses in
  the PROM to burn out, changing bits from 1 to 0
• Blank PROMs are inexpensive and are good for
  prototyping the data for a ROM before committing
  to the costly ROM fabrication process.

32
PROM

• A closer look

33
PROM

• Programming the PROM is accomplished by passing a
  high current through a specific transistor and
  melting the fuse
• One-time programmable

34
EPROM

• An EPROM eraser is not selective, it will erase
  the entire EPROM.
• The EPROM must be removed from the device it is
  in and placed under the UV light of the EPROM
  eraser for several minutes.

• An EPROM that is left under too long can become
  over-erased.
• In such a case, the EPROM's floating gates are
  charged to the point that they are unable to hold
  the electrons at all.

35
EEPROMs, Flash PROMs

• Programmable and erasable using floating-gate MOS
  transistors

36
EEPROM

• A type of PROM that can be erased by exposing it
  to an electrical charge
• Retains its contents when the power is turned off
  
• Not as fast as RAM
• Similar to flash memory (sometimes called flash
  EEPROM)
• requires data to be written or erased one byte at
  a time whereas flash memory allows data to be
  written or erased in blocks

BL
WL
37
EEPROM

• Floating-gate transistor programming

38
ROM

• Characteristics of state-of-the-art nonvolatile
  memory

39
Logic-in-ROM Example

• As we discussed previously, a ROM is simply a
  combinational circuit, basically a truth-table
  lookup
• Can perform any combinational logic function
• Address inputs function inputs
• Data outputs function outputs

(address)
(data)
40
Logic-in-ROM Example

• Two alternative implementations for the 3-input,
  4-output logic function
• 2-to-4 decoder with output polarity control

41
4x4 Multiplier Example

• ROM implementation of a 4x4 unsigned binary
  multiplier
• Multiplier and multiplicand form the address
• Product is pre-programmed into the storage
  location

42
4x4 Multiplier Example

• ROM contents for the 4x4 unsigned binary
  multiplier

43
Internal ROM Structure

• Typical implementation of primitive ROM

44
Two-Dimensional Decoding
45
Two-Dimensional Decoding
46
Two-Dimensional Decoding

• More than one bit

D3
D2
D1
47
Two-Dimensional Decoding

• 128 bits
• 16 x 8
• 4-bit address
• 2 for row select
• 2 for column select
• Tri-state output buffers
• 8-bit data bus

48
Larger Example, 32K x 8 ROM
49
ROM Control and I/O Signals

• n Address lines
• An-1 A0
• b Data lines
• Db-1 D0
• Chip Select
• One or more
• Active low
• Output Enable
• Active low
• Tri-state output buffers

50
ROM

• Commercial ROM types

51
Typical Commercial EEPROMs

• Logic symbols for representative EEPROMs

52
EPROM

• 27C256 is a 256K (32K x 8) CMOS EPROM
• 90 ns access time available
• Data Retention gt 200 years
• Organized 32K x 8 JEDEC standard pinouts
• 28-pin Dual-in-line package
• 32-pin PLCC Package
• 28-pin SOIC package
• 28-pin Thin Small Outline Package (TSOP)
• 28-pin Very Small Outline Package (VSOP)

53
EPROM

• 27C256, 256K (32K x 8) CMOS EPROM
• DIP/SOIC package shown

54
EPROM

• M27512 is a 524,288 bit UV erasable and
  electrically programmable memory EPROM
• Organized as 65,536 (64K) words by 8 bits
• Housed in a 28 Pin Window Ceramic Frit-Seal
  Dual-in-Line package
• Access time 200ns

55
EPROM

• M27512 logic symbol and signal names
• 16-bit address input
• 8-bit data word output

56
Microprocessor EPROM Application
57
Microprocessor EPROM Application
32K
32K
32K
32K
58
EEPROM Programming

• Apply a higher voltage to force bit change
• e.g., VPP 12 V
• On-chip high-voltage charge pump in newer chips
• Erase bits
• Byte-byte
• Entire chip (flash)
• One block (typically 32K - 66K bytes) at a time
• Programming and erasing are a lot slower than
  reading (milliseconds vs. 10s of nanoseconds)

59
ROM Timing

• tAA access time from address
• tACS access time from chip select
• tOE/tOZ output-enable/disable time
• tOH output-hold time

60
ROM Application

• A digital attenuator
• Uses a single 8K x 8 ROM, part number 28C64

61
ROM Application

• Program to generate the contents of an 8K x 8,
  32-position attenuator ROM for µ-law coded bytes.

62
ROM Application

• An adder circuit for µ-law coded bytes

63
ROM Application

• Program to generate the contents of a 64K x 8
  adder ROM for µ-law coded bytes.

64
Assignment

• Read section 9.2

64