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Switching - Fabric

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Title: Switching - Fabric


1
Switching - Fabric
  • Based on
  • An Engineering Approach to Computer Networking/
    Keshav

2
Switching
Number of connections from few (4 or 8) to huge
(100,000s)
3
Switching - Basic Assumptions
  • continuous streams vs. packet by packet
  • telephone connections
  • no bursts
  • no buffers
  • connections change
  • multicast
  • Blocking
  • external
  • internal
  • re-arrangeable
  • strict sense non-blocking
  • wide sense non-blocking

4
Multiplexors and demultiplexors
  • Multiplexor aggregates sessions
  • N input lines
  • Output runs N times as fast as input
  • Demultiplexor distributes sessions
  • one input line and N outputs that run N times
    slower
  • Can cascade multiplexors

5
Time division switching
  • Key idea when demultiplexing, position in frame
    determines output link
  • Time division switching interchanges sample
    position within a frame time slot interchange
    (TSI)

6
Example - TSI
sessions (1,2) (2,4) (3,1) (4,3)
2 4 1 3
TSI
4 3 2 1
7
TSI
  • Simple to build.
  • Multicast
  • Limit is the time taken to read and write to
    memory
  • For 120,000 circuits
  • need to read and write memory once every 125
    microseconds
  • each operation takes around 0.5 ns gt impossible
    with current technology
  • Need to look to other techniques

8
Space division switching
  • Each sample takes a different path through the
    switch, depending on its destination

9
Crossbar
  • Simplest possible space-division switch
  • Crosspoints can be turned on or off

10
Crossbar - example
sessions (1,2) (2,4) (3,1) (4,3)
1
2
input ports
3
4
4
1
2
3
output ports
11
Crossbar
  • Advantages
  • simple to implement
  • simple control
  • strict sense non-blocking
  • Drawbacks
  • number of crosspoints, N2
  • large VLSI space
  • vulnerable to single faults

12
Time-space switching
  • Precede each input trunk in a crossbar with a TSI
  • Delay samples so that they arrive at the right
    time for the space division switchs schedule

MUX
1
2 1
2
3
MUX
4 3
4
13
Time-Space Example
time 1
time 2
2 1
2 1
TSI
3 4
4 3
3 1
2 4
Internal speed double link speed
14
Finding the schedule
  • Build a graph
  • nodes - input links
  • session connects an input and output nodes.
  • Feasible schedule
  • Computing a schedule
  • compute perfect matching.

15
Time-space-time (TST) switching
  • Allowed to flip samples both on input and output
    trunk
  • Gives more flexibility gt lowers call blocking
    probability

16
Circuit switching - Space division
  • graph representation
  • transmitter nodes
  • receiver nodes
  • internal nodes
  • Feasible schedule
  • edge disjoint paths.
  • cost function
  • number of crosspoints
  • internal nodes

17
Example
sessions (1,3) (2,6) (3,1) (4,4) (5,2) (6,5)
1 2 3 4 5 6
1 2 3 4 5 6
18
Clos Network
Clos(N, n , k) N - inputs/outputs
kxn
nxk
(N/n)x(N/n)
2x2
3x3
N6 n2 k2
2x2
3x3
2x2
19
Clos Network - strict sense non-blocking
  • Holds for k gt 2n-1
  • Proof
  • Consider and idle input and output
  • Input box connected to at most n-1 middle layer
    switches
  • output box connected to at most n-1 middle layer
    switches
  • There exists a "free" middle switch.

20
Proof
21
Example
Clos(8,2,3)
2x3
4x4
3x2
2x3
4x4
3x2
N8 n2 k3
3x2
2x3
4x4
3x2
2x3
22
Clos Network - rearrangable
  • Holds for k gt n
  • Proof
  • Consider all input and output
  • find a perfect matching.
  • route the perfect matching
  • remaining network is Clos(N-n,n-1,k-1)
  • summary
  • smaller circuit
  • weaker guarantee
  • Mulicast ?

23
Clos Network
An example for blocking when kn
24
Rearrangable Clos Network routing algorithm
  • Start at some arbitrary 2x2 input switch, and
    route it to its destination through the upper
    switch.
  • Route the other output port of the 2x2 switch you
    reached to its input port through the lower
    switch.
  • If the other port in the input switched you
    reached has not been routed yet, route it through
    the upper middle switch.
  • Otherwise, select an arbitrary input port switch
    that was not yet used, and repeat the procedure.

25
Recursive constructions
1
1
N/2 x N/2
N/2 x N/2
n
n
26
Algorithm Complexity
  • N routing steps for each level
  • Log n levels to do
  • gt N log n
  • Given parallel hardware O(N) time

27
Alternative View of the problem
  • A graph coloring problem
  • Input/output switches nodes
  • A match link
  • Middle stage switches colors
  • This is the well known Coloring of bi-partite
    graph problem.
  • Heuristics fail miserably!!!

28
Another algorithm matrix based
  • Specification matrix
  • Rows input switches (nxm, 1..r)
  • Columns middle switches (rxr, N/n r, 1..m)
  • Content output switches (1..r)
  • We need an algorithms that will fill up the
    matrix with a feasible routing
  • Same number cannot appear in the same column
  • Works also for CLOS with redundancy

29
Algorithm Principle
  • For e0,1,2,
  • balance the destination e among the columns
  • Challenges
  • efficiency
  • termination
  • We describe an Algorithm by Lee, Hwang, and
    Carpinelli, T. Comm. 44 (11), Nov. 1996

30
The Matrix Meaning

0

1
2x3
4x4
3x2
2x3
4x4
3x2
3x2
2x3
4x4
3x2
2x3
31
The Matrix Meaning

0

1
2x3
4x4
3x2
1 3 4 0 7 5 6 2
2x3
4x4
3x2
3x2
2x3
4x4
3x2
2x3
32
The Matrix Meaning

0

1
2x3
4x4
3x2
0 1 2 0 3 2 3 1
2x3
4x4
3x2
3x2
2x3
4x4
3x2
2x3
33
Illegal example
0 1
0 2
3 2
3 1
2x2
2x2
0 1 2 0 3 2 3 1
2x2
4x4
2x2
2x2
2x2
4x4
2x2
2x2
34
Legal example
1 0
0 2
2 3
3 1
2x2
2x2
0 1 2 0 3 2 3 1
2x2
4x4
2x2
2x2
2x2
4x4
2x2
2x2
35
Notation
Nnxr
j

e


nxm
rxr
mxn
nxm
rxr
mxn
i
r rows
mxn
nxm
rxr
mxn
nxm
m columns
36
Data Structures
  • (j,e), j0,1,n-1, e0,1,,r-1 - the set of rows
    i such that sije
  • All the input switches routed to e thru j
  • 0(e), e0,1,r-1 - the set of columns j such
    that Si does not contain e
  • All middle switches that are not routing to e
  • 2(e), e0,1,r-1 - the set of columns j such
    that Si contains e at least twice
  • All middle switches that have contention routing
    to e

37
Algorithm
  • (Next Simple Swap)
  • If egt sik
  • i ? 2nd element of (j,e)
  • repeat step 3 on i
  • if egt sik goto step 5
  • (Successive Swap)
  • u ? e
  • remove k from 0(u)
  • if (j,u)2 remove j from 2(u)
  • v ? sik
  • swap sij with sik
  • remove i from (j,u) and (k,v)
  • add i to (j,v) and (k,u)
  • if eltv
  • if (k,v)0 add k to 0(v)
  • if (k,v)1 remove k from 2(v)
  • if (j,v)1 remove j from 0(v)
  • if (j,v)2 add j to 2(v)
  • goto step 1
  • Init e0
  • If 2(e) empty
  • e?e1
  • if er stop else goto 1
  • if 2(e)??
  • j ? 1st element of 2(e)
  • k ?1st element of 0(e)
  • (simple swap)
  • i ?1st element of (j,e)
  • if elt sik swap sij with sik
  • e ? sik
  • remove i from (j,e) and (k,e)
  • add i to (j,e) and (k,e)
  • if (j,e)1 remove j from 2(e)
  • if (j,e)1 remove j from 0(e)
  • if (j,e)2 add j to 2(e)
  • if (k,e)0 add k to 0(e)
  • if (k,e)1 remove k from 2(e)
  • remove k from 0(e)

38
Algorithm Complexity
  • adding an element to a set, choosing/removing the
    1st/2nd element from a set take O(1)
  • ? steps 5A 5B and 5D each take O(1) time
  • removing a generally positioned element from an
    r-set takes O(r) time ? step 5C time complexity
    is in O(r) 2(v)-k, 0(v)-j
  • the looping in step 5 does not contain step 5C,
    only 5B and 5D
  • ?
  • the time complexity for step 5 is O(r)
  • ?
  • Algorithm time complexity O(nr2)

39
Clos network size
  • Number of switching elements is given by
  • for kn (rearrangeable non-blocking)
  • Optimal value for n is nsqrtN/2, which yields

40
a lower bound for the number of switching
elements?
  • Assume we have 2x2 switching units.
  • We have N! switching permutation
  • Can we achieve this bound?

41
Benes Networks
  • Size
  • 2 log N 1 stages
  • N/2 switches in each stage
  • N log2 N N/2
  • Rearrangeable
  • Clos network with k2 n2
  • Symmetry
  • Example.
  • proof

42
Recursive constructions - Benes Network
1
1
N/2 x N/2
N/2 x N/2
n
n
43
Example 16x16
44
Strict Sense non-Blocking
N/2 x N/2
. . .
. . .
N/2 x N/2
N/2 x N/2
45
Cantor Networks
  • m copies of Benes network.
  • For m gt log N it is strict sense non-blocking
  • Network size N log2 N
  • Example

m4
46
Banyan
  • Self routing!
  • Size
  • log2 N stages
  • N/2 switches in each stage
  • 0.5N log2 N elements
  • This is less than the lower bound!

47
Banyan
111
48
Other Banyans
49
How do deal with internal blocking in Banyan
  • speed up
  • internal buffers
  • Batcher bitonic sorter

50
Batcher sorter size
  • nlog N sorters with 1,2,3,.. Columns
  • Each column has N/2 switches
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