Chip Multiprocessor and Multithreading Heterogeneous Chip Multiprocessors

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Chip Multiprocessor and MultithreadingHeterogeneo
us Chip Multiprocessors

• Rakesh Kumar, Dean M. Tullsen, Norman P.
  Jouppi, Parthasarathy Ranganathan
• University of California, San Diego
• HP Labs
• Computer Vol. 38, No. 11, 2005
• Sanghoon Lee

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Contents

• Performance Scaling and Technology Challenges
• What is the Chip Multiprocessor (CMP)?
• A Critical Question in CPMs
• Heterogeneitys Potential
• CMPs Power Advantages
• CMPs Throughput Advantages
• CMPs Mitigating Amdahls Law
• What Heterogeneity Means for Software?
• Future Research Questions
• Conclusion

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Performance Scaling and Technology Challenges
The TRIPS(The Tera-op, Reliable, Intelligently
adaptive Processing System) Project The
University of Texas at Austin, http//www.cs.utexa
s.edu/trips
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What is the Chip Multiprocessor (CMP)?
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A Critical Question in CPMs

• Amdahls Law
• The performance improvement to be gained from
  using some faster mode of execution is limited by
  the fraction of the time the faster mode can be
  used.
• Critical Question Size Performance
• Characteristics of applications are different
  from each other.
• How should designers choose between these
  conflicting requirements in core complexity?
• A large number of small cores
• A smaller number of larger, higher-power cores

Heterogeneous Chip Multiprocessor
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Heterogeneous Chip Multiprocessor

• Heterogeneous Multicore Architectures
• System-on-chip
• Multi-ISA multicore architecture
• Single-ISA multicore architecture
• Heterogeneous Multicore Design
• Conjoined-core chip multiprocessing
• CMP/interconnect codesign

Original core
Conjoined-core pair
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Heterogeneitys Potential
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Power Advantages

• Power consumption and Heat dissipation
• Increased power consumption and heat dissipation
• Higher costs for temperature management
• Currently used two techniques for power reduction
• Gating-based
• Voltage/frequency-scaling-based
• However, any technique applied at a single-core
  level suffers from limitations
• Leakage power
• Some dynamic power is still dissipated even for
  inactive blocks
• Heterogeneous CMP has the ability to
• dynamically switch between cores
• power down unused cores to eliminate leakage
• Reductions in processor energy delay product
• 84 for individual applications
• 63 overall

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Throughput Advantages

• Two reasons for performance advantages
• Heterogeneous CMP can match each application to
  the core best suited to meet its performance
  demands
• Heterogeneous CMP can provide improved
  area-efficient coverage of the entire spectrum of
  workload demands seen in a real machine.

Performance of heuristics for equal-area
heterogeneous architectures wit multithreaded
cores.
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Mitigating Amdahls Law

• The speedup of a parallel application is limited
  by the fraction of the application that is
  serial.
• To maximize the ratio of performance to power
  dissipation
• During serial portions of execution
• use a single large core to allow the serial
  portion
• During parallel portions of execution
• use a large number of small area- and
  power-efficient cores

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What Heterogeneity Means for Software?

• The system software must use the execution
  characteristics of each application to predict
  its future processing needs and then schedule it
  to a core that matches those needs if one is
  available.
• OS
• Compiler
• Programming or compiling parallel applications
  might require more awareness of the heterogeneity
  .
• Mechanisms for communicating the complete
  processor information to software
• Mechanisms for the design of software to tolerate
  heterogeneity
• To support for virtualization

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Future Research Questions

• Designs of asymmetric CMP cores
• The number of core types
• the available die area
• the total power budget
• What benefits are possible if all the resources
  in the cores are not monotonically increasing?
• The impact of heterogeneity on the cost of design
  and verification

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Conclusion

• Monolithic processors
• consume too much power.
• do not provide enough marginal performance.
• Replicating monolithic processors
• results in a linear increase in power.
• results in a sublinear increase in performance
• cannot handle high-demand and high-priority
  applications.
• Single-ISA heterogeneous (or asymmetric)
  multicore architectures
• result in significant power and performance
  benefits.
• The potential benefits are greater than the
  potential benefits from the individual techniques
  of voltage scaling, clock gating, or speculation
  control.
• Much research remains on the best types and
  degrees of heterogeneous CMPs for both throughput
  and power.