YieldAware Analog Integrated Circuit Optimization using Geostatistics Motivated Performance Modeling

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Yield-Aware Analog Integrated Circuit
Optimization using Geostatistics Motivated
Performance Modeling
Guo Yu and Peng Li
Department of ECE Texas AM University yuguo,
pli_at_neo.tamu.edu
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Motivation

• Analog circuit optimization
• Find best performance point(s) with simulation or
  performance model
• Simulation-based optimization ? accurate, time
  consuming
• Model-based optimization ? fast, maybe inaccurate
• Pareto front
• Trade-off of competing performances Stehr et al,
  DAC 03
• Esp. useful in hierarchical analog optimization
  Zou et al, DAC 06

Pareto front
Corresponding performance area
Map
Design space
Performance space
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Motivation

• Pareo front in large analog circuit optimization
• Hierachical Phase-locked loop (PLL) optimization
  Zou et al, DAC 06

Pareto fronts
Pareto fronts for VCO
System level optimization
Map back to transistor size
Phase locked loop
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Motivation

• Robust analog circuit optimization
• Conventional optimization may push performance
  into corners
• Not robust to process variations ? Low yield
• Consider yield when doing optimization Tiway et
  al, DAC 06
• Yield-aware Pareto fronts
• Guarantee to achieve the performance with certain
  yield
• Relax performance for higher yield ? trade off

P2
80 yield
50 yield
nominal
? 20 yield
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Motivation

• Yield-aware pareto front generation
• Performance distribution with Monte-Carlo
  simulation
• Select performance according to the required
  yield
• Computation cost may increase 100X
• An efficient and accurate modeling technique is
  needed
• Pareto front generation needs more evaluation
  points
• Yield analysis needs Monte-Carlo simulation
• Propose to use Kriging performance mode
• Self-evaluation of confidence level ? increase
  accuracy
• Suitable for fast Monte-Carlo simulation

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Geostatiscs Motivated Kriging Modeling

• Modeling stochastics process in geography with
  Kriging model Matheron, Economic Geology 63
• Use measured data to fit geology model
• Can be applied for deterministic performance
  modeling
• Complex geology modeling ? good accuracy
• Stochastics ? error/uncertainty prediction

Modeling error too large?
Include measurement results of these points into
the Kriging model
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Performance Modeling with Kriging Model

• Key benefits of Kriging model
• Good accuracy with limited training data
• Uncertainty level prediction for iterative search

Resample in design space
Kriging model
If predicted err gt errmax Include this point as
training data
Design parameter space
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Outline

• Motivations
• Background
• Nominal analog circuit optimization
• Construct Kriging models with design parameters
• Build pareto fronts in nominal case
• Yield-aware analog circuit optimization
• Include process variations into Kriging models
• Partial Kriging model for efficient Monte-Carlo
  simulation
• Generate yield-aware pareto fronts with updated
  Kriging models
• Experimental results
• Conclusions

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Kriging Model Fundamental

• Deterministic function approximation

Model detailed nonlinearities
Global trend
Compensation
Input
Output
Model training data
New point
Correlation of Z
Correlation parameter E.g. P2 ? distance based
Correlation parameter Fine correlation tuning
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Kriging Model Fundamental (cont.)

• Performance prediction in new point
• Uncertainty prediction in new point

Distance of new point and training data
New point
Model parameter Uncertainty level prediction
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Kriging Model Generation

• Model construction with maximum likelihood
  estimation
• Deterministic problem ? optimization problem

MLE of model para.
Prediction of
Optimization problem
Maximize the MLE
MSE
Model para.
Perf. prediction
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Nominal Pareto Front Generation
Uniformly sample in design space
Find corresponding design parameters
Pareto front after 1st run
Search for best performances
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Nominal Pareto Front Generation (cont.)

• Iterative search to push to the boundaries

Sample more points near init. pareto fronts
Pareto front after 1st run
Regenerate pareto front
Not converged? Search again
Converged
Final pareto front in nominal case
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Kriging Models for Yield-aware Optimization

• Regenerate Kriging model with process variation
  information
• Add process variables as inputs in Kriging model
• Kriging model generation issues
• Model dimension increase with process variations
• E.g. 7 design variables, 23 process variables for
  ring VCO
• Computation cost raises for yield analysis ?
  partial Kriging model

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Yield Evaluation with Kriging Model

• Replace nominal perf. with the perf. at certain
  yield
• Guarantee to achieve the performance at that
  yield level
• Evaluate performance distribution with Kriging
  model

Monte-Carlo sim. for design point
50
20
80
Use performance at specified yield level for
Pareto front generation
Design space
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Partial Kriging Model

• Save computation cost by reusing pre-calculated
  terms

Training data, evaluate once
Recalculate with new input
Same set of process dis. for all the design points
Process variables Can be reused!!
Design parameters Need to be modified in the
optimization
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Yield-aware Pareto Front Generation
Search in the design space
Generate yield pareto fronts
Not converged? Search again
Initial pareto fronts
Converged
Yield-aware pareto fronts
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Experimental Results

• Five-stage ring oscillator
• Design parameter transistor sizes
• Process variations transistor threshold voltages
• Performance power, VCO gain, max. frequency

Kriging model accuracy verification
Ring oscillator schematic
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Experimental Results

• Yield-aware pareto front for ring oscillator

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Experimental Results

• Verification of pareto front
• Sample in the design space for verification

Verification samples
50 yield pareto front
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Experimental Results

• LC oscillator
• Design parameter transistor sizes, inductance,
  biasing current
• Process variations transistor threshold
  voltages, inductor mismatch, parasitic capacitors
  and resistors
• Performance power and VCO gain

Kriging model accuracy verification
LC oscillator schematic
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Experimental Results

• Yield-aware pareto fronts for LC oscillator

80 yield pareto front
50 yield pareto front
Nominal pareto front
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Experimental Results

• Two-stage operational amplifier
• Design parameter transistor sizes
• Process variation transistor threshold voltages
• Performance DC gain, 3-dB bandwidth

Two-stage Opamp schematic
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Experimental Results

• Iterative pareto front generation

Initial pareto front
Sort for pareto front
Converged pareto front
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Experimental Results

• Yield-aware pareto fronts for operational
  amplifier

80 yield pareto front
50 yield pareto front
20 yield pareto front
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Experimental Results

• Run-time cost for optimization
• Kriging model sampling with SPICE optimization
  for model generation
• Pareto front iterative search with Kriging
  models

Run-time for pareto front generation
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Conclusion

• Apply Kriging model for performance modeling
• Connect performance with design parameters and
  process variables
• Update model with uncertainty prediction
• Nominal pareto front generation
• Sample in the design space with Kriging model
• Iterative search to build pareto fronts
• Yield-aware pareto front generation
• Use nominal pareto fronts as staring points
• Model both design parameters and process
  variables
• Partial MC simulation for efficient yield
  calculation

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Thank You!

• Any Question?

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Kriging Performance Model Generation
N
Y