Luminosity Monitor Electronics

1
Luminosity Monitor Electronics

• LM Electronics Goals - R. Partridge
• LM Electronics Overview - R. Partridge
• LM Analog Electronics - R. Partridge
• LM Digitization Electronics - R. Partridge
• LM FPGA Design - C. Miao

2
LM Electronics Goals

• Make precise TOF measurement for each LM counter
• 24 counters per end, 48 counters total
• Intrinsic time resolution of counters is st
  210 ps
• Apply calibration, charge slewing corrections to
  data
• Provide L1 Trigger Framework with Luminosity
  signal
• Coincidence of hits on N and S detectors
• Vertex position consistent with interaction
• Luminosity Scalers are built into the L1
  Framework
• Also send Halo signals, diffractive triggers,
  vertex position
• Provide L1 Multiple Interaction trigger
• Look for spread in measured arrival times at each
  end
• Provide accelerator diagnostic and calibration
  capabilities
• Histogram vertex position or a selected ADC
  output in hardware at full beam crossing rate

3
LM Overview
Muon VME Crate
4
Luminosity Monitor Analog Electronics
Time Measurement
Belden 9913F
T ? Q
CAFE
Charge Measurement
LM Detector
OTA
CAFE
MCH
5
PMT Electronics

• Set HV for 2 pC / MIP
• 50 C / fb-1 to minimize PMT aging
• x10 amplifier mounted on detector
• 100 mV pulse to reduce noise sensitivity
• RG-58 cable off detector, Belden 9913F cable to
  MCH
• Maintain fast rise time for precision TOF

6
LM Front-End Electronics

• Discriminate signal for timing measurement
• 30 mV threshold
• Time-to-Charge converter
• Use differential pair to switch precision current
  source on at discriminated PMT signal, off at
  common STOP signal
• Essentially the same design as Run 1
• 25 ps residuals for DT gt 5 ns
• OTA - Operational Transconductance Amplifier
• Acts like an ideal transistor
• Current on collector proportional to voltage on
  base
• Transconductance determined by the resistance
  between the emitter and ground
• Small (10 mA) collector offset current
• Large (25 kW) output impedence
• Self-biased, bipolar, 850 MHz bandwidth

7
LM Digitization Electronics

• Use CAFÉ cards developed for CDF calorimeter
  readout
• 50 W input impedance, -3V input bias voltage
• Charge integration done using QIE chip
• Input current divided among 8 ranges
• 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of
  input current
• Each range has a four-stage pipelined current
  integrator
• Integrate, Range select, Readout, Reset
• Readout first non-saturated range
• QIE output digitized by 10 bit ADC
• ADC output, QIE range, QIE pipeline stage, and
  readout mode fed into non-volatile RAM lookup
  table (16 x 64K)
• Provides calibrated time output and time slewing
  correction
• Transparent readout mode for calibration
• Calibration current source, input DC current
  monitor