Affine Global Motion Estimation and Hardware Implementation Mong Chit Wong Maggie and Prof' Truong N - PowerPoint PPT Presentation

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Affine Global Motion Estimation and Hardware Implementation Mong Chit Wong Maggie and Prof' Truong N

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Visual communication has evolved rapidly due to the hardware improvement and ... The hardware is being implemented in verilog. ... – PowerPoint PPT presentation

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Title: Affine Global Motion Estimation and Hardware Implementation Mong Chit Wong Maggie and Prof' Truong N


1
Affine Global Motion Estimation and Hardware
Implementation Mong Chit Wong (Maggie) and Prof.
Truong NguyenVideo Processing Group, UCSD
Abstract Visual communication has evolved rapidly
due to the hardware improvement and compression
technology. Videos are highly compressible
because of the similarity in their neighboring
frames. Our novel GME algorithm is able to track
the background information using merely a 6
parameter affine model per frame. Compared to the
conventional motion estimation used in MPEG2
which uses block-based matching and uses more
than hundreds of motion vectors per frame, the
new GME algorithm uses only one motion vector per
frame. And thus achieved higher coding efficiency
and better video results. We carried out hardware
implementation on the coarse estimation step of
the GME algorithm during the summer research
period. This is on-going research, and further
implementation and optimization on the rest of
the steps are expected in the future.
Hardware Implementation (coarse estimation)
  • The hardware is being implemented in verilog.
    Each of the modules are simulated in Modelsim 5.8
    and Matlab to verify the function correctness and
    bit length, and eventually synthesized by Cadence
    Build gate.
  • Optimization Tricks
  • Different tricks are used in the implementation
    to reduce mathematical complexity.
  • - Magnitude approximation
  • - Log base 2 approximation
  • Log2(13) 3.7
  • Log2(1101) 3 ½ 1/8 3.625 log2(13)
  • Normalization approximation

Input frame
Decimation Module
Done
Address_read
Address_write
Go
Enable_m1
Reset_n
State1 _nstate2
Enable_m2
Enable_m3
Output frame
Memory
Control
FFT Module
Done
Input I, R
Memory
Go
Network Channel
Magnitude Module
GME coding
Output Mag
Reset_n
done
In xy
Log polar Module
Go
Out address
Enable_m
Reset_n
Out log polar
Proposed Method
Coarse Estimation in Frequency domain
FFT Module
Reference Image
Transformed Image
Reference Image
Transformed Image
Translation Invariance
Decimation
Done
Cross Power Spectrum Module
Old spec
Log-polar Mapping
Estimate of B
Go
Refinement of Parameters in Spatial domain
Phase Correlation
New spec
Coarse estimation In Frequency domain
Phase Correlation
Refined Parameters
Reset_n
Estimation of A
Coarse Affine Compensation
Reserved spec
Estimate of A
Affine compensation
Inverse FFT Module
Dataflow from Modelsim (decimator)
Output wave from Modelsim (decimator)
Simulation Results
Synthesized Result (By Cadence Buildgates) Decima
tion Module 74000 gate counts FFT Magnitude
7800 gate counts Log polar 200000 gate
counts Speed 100 MHz
done
correlation
Peak Location Module
Go
index
Reset_n
Coarse estimated motion vectors
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