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UIUC CS 497: Section EA Lecture

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Soundness; Completeness theorem. Deduction theorem. De Morgan Laws. Today ... Soundness, completeness, and incompleteness theorems. Models of first-order logic ... – PowerPoint PPT presentation

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Title: UIUC CS 497: Section EA Lecture


1
UIUC CS 497 Section EALecture 2
  • Reasoning in Artificial Intelligence
  • Professor Eyal Amir
  • Spring Semester 2004

2
Last Time
  • Propositional logic as a language for
    representing knowledge
  • Did not touch on reasoning procedures
  • Defined language, signature, models
  • From homeworks you should know
  • Soundness Completeness theorem
  • Deduction theorem
  • De Morgan Laws

3
Today
  • Reasoning procedures for propositional logic
  • Checking Satisfiability (SAT) using DPLL
  • Proving entailment using Resolution
  • Application du jour Formal Verification
  • Applications we will not touch
  • AI planning, graph algorithms, cryptography,

4
SAT via Generate and Test
  • If we have a truth table of KB, then we can check
    that KB satisfiable by looking at it.
  • Problem n propositional symbols ? 2n rows in
    truth table
  • Checking interpretation I takes time O(KB)
  • Generating table is expensive O(2n KB) time
  • Observation SAT requires us to look only for one
    model

5
Clausal Form
  • Every formula can be reformulated into an
    equivalent CNF formula (conjunction of clauses).
  • Examples (using De Morgan Laws)

6
Clausal Form
  • Every formula can be reformulated into an
    equivalent CNF formula (conjunction of clauses).
  • Examples

7
Clausal Form
  • Every formula can be reformulated into an
    equivalent CNF formula (conjunction of clauses).
  • Examples

8
Propagating a Truth-Value
  • KB in CNF, and we observe pTRUE
  • Then, removing clauses with p positive from KB
    gives an equivalent theory.
  • Example

KB
9
Propagating a Truth-Value
  • KB in CNF, and we observe pTRUE
  • Then, removing negative instances of p from KB
    gives an equivalent theory.
  • Example

KB
Observe
10
DPLL Search Procedure for CNF
  • If no clauses in KB, return T
  • If a clause in KB is empty (FALSE), return F
  • If KB has a unit clause C with prop. p, then
    return DPLL(KB,p?polarity(p,C))
  • Choose an uninstantiated variable p
  • If DPLL(KB, p?TRUE) returns T, return T
  • If DPLL(KB, p?FALSE) returns T, return T
  • Return F

11
DPLL in Action
On board
12
DPLL in Action
On board
Note we could know without thorough
checking that this KB is satisfiable
13
DPLL in Action
On board
14
Related SAT Solving
  • Order of selection of variables (lecture 5)
  • Stochastic local search (paper 1)
  • Binary Decision Diagrams (paper 2)
  • Strategies other than unit (paper 23)
  • 2-SAT is solvable in linear time
  • Smart backtracking (paper 21)
  • Clauses/Vars in Random SAT (paper 22)
  • SAT via probabilistic models (paper 15)

15
Take a Breath
  • Until now SAT solving
  • Search in the space of models
  • From now Resolution theorem proving
  • Search in the space of proofs
  • Later Formal Verification

16
Resolution Theorem Proving
  • Given
  • KB a set of propositional sentences
  • Query Q a logical sentence
  • Calling procedure
  • Add ?Q to KB
  • Convert KB into clausal form
  • Run theorem prover. If we prove contradiction,
    return T. Otherwise, return F.

17
Resolution Theorem Proving
  • Add ?Q to KB
  • Convert KB into clausal form
  • Run theorem prover. If we prove contradiction,
    return T. Otherwise, return F.
  • Deduction theorem
  • KB Q iff KB ? ?Q
    FALSE

-
-
18
Resolution Theorem Proving
  • Add ?Q to KB
  • Convert KB into clausal form
  • Run theorem prover. If we prove contradiction,
    return T. Otherwise, return F.
  • Deduction theorem
  • KB Q iff KB ? ?Q
    FALSE

-
-
19
Propositional Resolution
  • Resolution inference rule
  • C1 p1 ? C1
  • C2 ?p1 ? C2
  • --------------------
  • C3 C1 ? C2

C1 ? ?p1 ? C1
C2 ? p1 ? C2
20
Propositional Resolution
  • Resolution algorithm (saturation)
  • While there are unresolved C1,C2
  • Select C1, C2 in KB
  • If C1, C2 are resolvable, resolve them into a new
    clause C3
  • Add C3 to KB
  • If C3 (empty clause),
  • we got a contradiction.
  • STOP

C1 p1 ? C1 C2 ?p1 ? C2 --------------------
C3 C1 ? C2
21
Resolution in Action
On board
C1 p1 ? C1 C2 ?p1 ? C2 --------------------
C3 C1 ? C2
KB
Negated Query
22
Resolution in Action
On board
C1 p1 ? C1 C2 ?p1 ? C2 --------------------
C3 C1 ? C2
KB
Negated Query
23
Properties of Resolution
  • Running time for n variables, m clauses
  • Resolving two clauses
  • O(n)
  • Finding two resolvable clauses
  • O(1)
  • Overall algorithm
  • O(3nn)

24
Properties of Resolution
  • Theorem Resolution is sound
  • Resolving clauses in KB generates valid
    consequences of KB
  • Theorem Resolution is refutation complete
  • Resolution of KB with ?Q yields the empty clause
    iff KB Q

-
25
Properties of Resolution
  • Resolution does not always generate Q
  • KB a,b, ?a,b, b,c
  • Q b ? ?c b,?c
  • Theorem Resolution always generates a clause
    that subsumes Q iff KB Q
  • Example Resolving KB generates b

-
26
Simple Enhancements
  • Remove subsumed clauses
  • p subsumes p , q
  • p , q subsumes p , q, r
  • ?p does not subsume p , q
  • Contract same literals
  • p , p , q becomes p , q
  • Unit resolution resolve unit clauses first

27
Related to Prop. Resolution
  • Clause selection for resolution (lecture 5,
    paper 19)
  • Consequence finding (paper 3)
  • Prime implicates/implicants (paper 4)

28
Resolution vs SAT
  • SAT solvers can find models
  • Resolution sometimes better at finding
    contradictions
  • With resolution it is easier to explain and
    provide a proof

29
Summary So Far
  • Finding models using DPLL
  • Resolution theorem proving allows us to find
    contradictions and explanation.
  • The deduction theorem tells us how to ask queries
    from either SAT solvers or Resolution

30
Application Hardware Verification
f3
x1
f1
not
AND
x2
f5
AND
not
f2
OR
x3
f4
Question Can we set this boolean cirtuit to TRUE?
f5(x1,x2,x3) a function of the input signal
31
Application Hardware Verification
f3
x1
f1
not
AND
x2
f5
AND
not
f2
OR
SAT(f5) ?
x3
f4
Question Can we set this boolean cirtuit to TRUE?
f5(x1,x2,x3) f3 ? f4 ?f1 ? (f2 ? x3)
?(x1 ? x2) ? (?x2 ? x3)
Mx1FALSE Mx2FALSE Mx3FALSE
32
Hardware Verification
  • Questions in logical circuit verification
  • Equivalence of circuits
  • Arrival of the circuit to a state (required a
    temporal model, which gets propositionalized)
  • Achieving an output from the circuit

33
Summary
  • SAT checking using DPLL (instantiate, propagate,
    backtrack)
  • Entailment/SAT checking using Resolution (create
    more and more clauses until KB is saturated)
  • Formal verification uses mainly SAT checking such
    as DPLL, but also sometimes resolution

34
Next Time
  • FOL Resolution
  • Homework
  • Read readings (incl. application reading)
  • Make sure you know
  • Deduction theorem for FOL
  • Language of FOL
  • Soundness, completeness, and incompleteness
    theorems
  • Models of first-order logic
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