Title: Burst-Mode Technologies for Ultra-High Bit Rate, Agile Photonic Networks
1Burst-Mode Technologies for Ultra-High Bit
Rate, Agile Photonic Networks
- David V. Plant
- James McGill Professor
- Bell Canada/NSERC Industrial Research Chair
- Department of Electrical and Computer Engineering
- McGill University
- CMOS Emerging Technologies
- Vancouver
- Sept. 23, 2009
- Acknowledge B. Shastri, M. Zeng, and N. Zicha
-
2Outline
- Overview of PONS
- 5/10 Gb/s Burst Mode Receiver
- 1.25 Gb/s Burst Mode Receiver Performance over a
1300km link - Conclusions
3Outline
- Overview of PONS
- 5/10 Gb/s Burst Mode Receiver
- 1.25 Gb/s Burst Mode Receiver Performance over a
1300km link - Conclusions
4Multiaccess Networks
Downstream TDM ? 1.55 ?m
t
PS/PC
OLT
ONT
CO
t
Upstream TDMA ? 1.3 ?m
5Outline
- Overview of PONS
- 5/10 Gb/s Burst Mode Receiver
- 1.25 Gb/s Burst Mode Receiver Performance over a
1300km link - Conclusions
6Burst-Mode Receivers at OLT
Amplitude variations, ?A
Phase variations, ?f
CDR clock phase self-adjusts until lock achieved
clock walk
7Problem Statement
- Amplitude variations (?A) ? APD/TIA BM-LA
- Phase variations (??)
-
- Frequency variations (?f)
- Short packets ? amplitude, phase, and frequency
recovery must be quick.
8Bursty Upstream PON Traffic
0!
- Packet 1 (dummy) - force BM-CDR to lock to
certain phase before packet 2 arrival. - Measurements made on packet 2.
- Goal is to reduce preamble field so as to (1)
decrease burst-mode sensitivity penalty, (2)
increase information rate, (3) improve upstream
PON efficiency.
9Conventional SONET CDR
- PLR 10-6 ? BER 10-10
- Preamble bits gt 48
- Shows clock walk
CDR clock phase self-adjusts until lock achieved
clock walk
10Burst-Mode CDR
2 CDR CPA
2 CDR
115 Gb/s Burst-Mode CDR
- SONET CDR Centellax Part TR1C1-A recovers
clock/data supports 5 Gb/s data rate and 10 Gb/s
sampling rate. - CPA (byte syncs phase picker) detects packet
delimiter and performs clock phase acquisition
implemented on a field programmable gate array
(FPGA) Xilinx Virtex IV. - 116 deserializer (DES) Maxim-IC Part
MAX3995 produces 625 Mb/s data/clock by
dividing output of CDR for digital logic
processing on FPGA. - 18 double-data rate (DDR) DES further
parallelizes the data/clock to 78.125 Mb/s to
ensure proper synchronization and better
stability of DCM. - Digital-clock manager (DCM) provides multiple
phases of source clock, and zero propagation
delay with low clock skew between output clock
signals distributed on FPGA.
12Experimental Setup
13PLR vs. Phase Steps
CDR
BMRx
- PLR 10-6 ? BER 10-10
- Preamble bits gt 48
- Shows clock walk
- PLR 10-6 ? BER 10-10
- Preamble bits 0!
- Shows phase-picking works using delimiter field
DVP
13
14BER Measurements
15PON Efficiency
- Eus efficiency of upstream traffic
- nONU number of ONUs in PON
- tgt guard time
- tpre preamble time
- TDBA bandwidth allocation cycle
- RTT round-trip time OLT/ONU
- Tdelay other factors
- GEPON (1.25 Gb/s) standard Eus 70 for nONU
32, tgt 1024 ns, tpre 832
ns, and TDBA 200 µs.
Ref Nishihara et. al., J. Lightw. Technol., vol.
26, no. 1, 2008.
16Outline
- Overview of PONS
- 5/10 Gb/s Burst Mode Receiver
- 1.25 Gb/s Burst Mode Receiver Performance over a
1300km link - Conclusions
17Experimental Setup
Montréal Québec City Montréal RISQ Network
18Eye Diagrams
19PLR vs. Phase Steps
CDR
BMRx
- PLR 10-6 ? BER 10-10
- Preamble bits gt 48
- Shows clock walk
- PLR 10-6 ? BER 10-10
- Preamble bits 0!
- Shows phase-picking works using delimiter field
20Outline
- Overview of PONS
- 5/10 Gb/s Burst Mode Receiver
- 1.25 Gb/s Burst Mode Receiver Performance over a
1300km link - Conclusions
21Conclusions
- Demonstrated a simple yet effective solution for
acquiring phase. - Solution demonstrated over 1300 km live link.
- Moving towards chip-level solution.
22Extras
23100 Gb/s is Next
- Drivers of 100 Gb/s
- New services such as IPTV and HD-TV, video on
demand, interactive video gaming, education on
demand, video conferencing, and video
surveillance - Voice requires 64 kb/s
- Video requires 100 Mb/s
- Increase in of
research publications - Several 100 G
commercial field trials
24Fiber Optic System Capacity
10-Tb/s Systems
Research Systems
Commercial Systems
Advanced Modulation Formats
Single Channel
DWDM
(Alcatel-Lucent)
25BMRx with FEC
2664/57 Hamming Decoder
27Receiver Sensitivity
- Preamble penalty of 48 bits with CDR.
- Power penalty of 0.2dB with BM-CDR.
- Tradeoff!
28PON Architecture Topology
P2P
P2MP
P2MP
- Active star
- Only a single feeder fiber is needed to carry all
traffic to an active node - Reduced costs
- Active node needs powering and maintenance
- Passive star (PON)
- Active node replaced by power splitter/combiner
- Reduced installations costs
- A completely passive nature of outside plant
- Avoids power and maintenance costs
- Well designed access techniques to avoid traffic
collision
- Point-to-point
- Provides ultimate capacity and most flexibility
to upgrade services for customers - Many fibers from local exchange to homes
- Entails high first installation costs
- At local exchange, many fiber terminals as homes
- Floor space and power issues
29PON Data Rate Scaling
30What Will PONs Enable?
- Triple play services voice, video, high-speed
data for fast Internet, - HDTV, on-line gaming, fast P2P file transfer
- FTTH/P can solve problem of limited bandwidth to
end-user last mile problem.
31RISQ Network
Québec city
Montréal