Commercial SOI Microprocessor: Test and Radiation Test Guideline Task 04046

1
Commercial SOI Microprocessor Test and Radiation
Test GuidelineTask 04-046
Description
Benefits

A radiation test guideline was to be
delivered inFY03 under NEPP funds incorporating
the previous work at JPL and GSFC.Due to funding
cuts mid-year, delivery is delayed until FY04.
The guideline will concentrate on SEU effects,
but will also include total dose. A survey of
test methods by all organizations will be
undertaken and documented. Methods of
distinguishing crashes in the operating system
from functional errors in the processor will be
included, along with approaches for evaluating
the effect of internal transients at high clock
speed. The guideline will use existing
data on commercial and radiation-hardened
microprocessors, including test results for the
RAD6000 and RAD750, PowerPC and Pentium families.
It will also include recommendations for error
visibility, which are essential to calculate
upset rates in space applications.
The prime benefit is providing a common reference
for radiation tests on these complex devices.
This is a critical issue, even for radiation
hardened processors, because the interpretation
of test data is ambiguous without an accepted
test method.
Deliverables

• BOK for existing radiation data and test methods
  for commercial and hardened processors
• Comparison of test methods
• Selected tests of new SOI devices
• - Test guideline

Risks
Schedule/Costs
Total ROM Cost (non-CS) 150K
Lead Center/PI JPL/A. Johnston Co-Is Center
Funding Split JPL - 150K
Non-NASA Organizations/Procurements None.

Tactical 7 , Slide 18