Seminar: Moderne Methoden der analogen Schaltungstechnik

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Seminar Moderne Methoden der analogen
Schaltungstechnik

• Teil II B discrete-time Receiver
• Eugenio Di Gioia

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Discrete-time Receiver

• In deep submicron CMOS technology, time
  resolution is much higher than voltage resolution
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• Capacitor ratios are very precise too
• A new architecture is needed, that exploits both
  these advantages.
• Solution discrete-time Receiver, all-digital PLL
  and Digital Transmitter

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Discrete-time Receiver and all-Digital
Transmitter 6

• Three main sections
• Discrete-time receiver
• Digitally Controlled Oscillator (DCO) All
  Digital PLL (ADPLL)
• Transmitter (Digital Power Amplifier)

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Part I

• Discrete-time Receiver

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Discrete-time receiver
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Traditional time-continuous mixer
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Time-discrete mixer

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Time-discrete mixer

• Bandpass sampling is the intentional aliasing of
  the information bandwidth of the signal 1
• The input signal must be bandpass filtered
• It can be easily combined with a Sigma-Delta ADC
  (high sampling rate, high resolution, narrowband)

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Bandpass sampling frequency spectrum
Signal band
Alias-bands
Before the downsampling After the downsampling
All the frequencies in the range nfsfb (n
integer) alias with the signal frequency band
the RF-signal must be band-filtered before being
sampled In this example fsfc ? fIF 0
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Downsampling frequency spectrum
Signal Band
Alias Bands
A/A Filter
fS2 gt fS1
Increasing the sampling frequency fs moves the
unwanted alias frequencies farther from the
signal -gt Anti Aliasing Filter is made easier
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Trade-offs

• Higher fs relaxes the A/A-Filter and reduces the
  effect of clock jitter 2
• Lower fs means lower power consumption and easier
  circuit design (ADC and frequency synthesizers
  specifications are relaxed)

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Noise Model of a subsampling receiver
fS Sampler Nyquist frequency Ga LNA Gain es
source noise ea LNA noise fS sampling
frequency Cs sampling capacitor Beq
equivalent noise bandwidth of the A/A filter
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Subsampling down-converter LNA Noise 2

• High-frequency noise of the LNA will be aliased
• A/A-Filter (Beq) must be very selective
• RF-Sampling is difficult we need a BP-Filter
  centered at an RF-frequency with high selectivity

Input-referred noise
Sampler Nyquist frequency
The source noise and the noise of the circuits
before the sampler are amplified by Beq/fN! This
coefficient must be as small as possible!
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Subsampling down-converter kT/C Noise 3

• Input referred noise higher than in time
  continuous mixer because of the kT/C noise
• ß is the hold-time duty cycle (normally 0.5)
• Reduction of the kT/C Noise
• Higher sampling frequency
• Larger sampling capacitors
• High Gain LNA reduces the input-referred kT/C
  Noise

where
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Subsampling down-converter Jitter

• Jitter noise on the sampling frequency behaves
  like phase-noise in analog oscillators 3
• Jitter is important only by strong input signal
  level (by small input the thermal noise
  dominates)

PJ Jitter Power fin Input signal
frequency Ain input signal amplitude sJ
jitter std deviation
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How to perform the bandpass anti-aliasing
filtering?

• Time continuous at RF before the first mixer
• Time discrete FIR-Filters after the first
  downconversion mixer, at IF

ai Filter coefficients N Number of
coefficients (taps)
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FIR Filter (example with 23 taps) 3
The center frequency can be adjusted through the
sampling frequency, in this case f0 fs / 4
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Scheme of the filter downsampler 3




Downsampler Sinc Filtering
FIR
FIR
Downsampler Sinc Filtering
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Sampling of RF-Signals

• We saw that is, the jitter power is
  proportional to fin².
• The jitter-power is very high when sampling
  RF-Signals
• Variation of VGS while tracking causes an
  input-dependant sampling instant (variation of
  the sampling instant) ? Jitter 5

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Other input-dependent non idealities

• Variation of the on-resistance of the switch as a
  function of
• VGS VCLK-VIN
• VT variation with VSB -VIN
• Channel charge injection in the hold-capacitor ?
  error in the sampled value
• Solution S/H circuit with constant VGS

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Realization of a linearized sampling mixer with
constant VGS of the sampling MOS 4
VCLK 0 ? VGS VK constant ? Tracking
Phase VCLK 1 ? VGS - VIN lt 0 ? Hold Phase
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Alternative solution current sampling 6

• Current sampling minimizes the effects of the MOS
  sizing
• Charge injection and clock feedthrough causes
  only DC-Offsets
• These Offsets can be cancelled through a
  current-feedback

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Discrete-time Receiver 6

• Sampling is performed at RF-Frequency (after LNA
  and RF-filtering)
• The successive decimation method is used
• Before every decimation DT-Anti-Aliasing
  Filtering is carried out

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References

• 1 R. G. Vaughan et al. The theory of bandpass
  sampling, IEEE 1991
• 2 S. Lindfors et al. A 3-V 230-MHz CMOS
  Decimation Subsampler, IEEE 2003
• 3 D. Jakonis et al. A 2.4-GHz RF Sampling
  Receiver Front-End in 0.18 µm CMOS, IEEE 2005
• 4 D. Jakonis et al. A 1 GHz Linearized CMOS
  Track-and-Hold Circuit, IEEE 2002
• 5 B. Razavi, Principles of Data Conversion
  System Design, IEEE Press, 1995
• 6 R. B. Staszewski et al. All-Digital TX
  Frequency Synthesizer and Discrete-Time RX for
  Bluetooth Radio in 130-nm CMOS, IEEE 2004
• 7 R. B. Staszewski et al. A first
  multigigahertz Digitally Controlled Oscillator
  for wireless applications, IEEE 2003
• 8 R. B. Staszewski et al. All-Digital PLL and
  Transmitter for Mobile Phones, IEEE 2005
• 9 R. B. Staszewski et al. Phase-Domain
  All-Digital Phase-Locked Loop, IEEE 2005