60-GHz Direct-Conversion Transceiver on 130-nm CMOS with Integrated Digital Control Interface B. N. Wicks, C. M. Ta, F. Zhang, P. Nadagouda, B. Yang, Z. Liu, Y. Mo, K. Wang, T. Walsh, G. Felic, R. J. Evans, I. Mareels, and E. Skafidas National ICT - PowerPoint PPT Presentation
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60-GHz Direct-Conversion Transceiver on 130-nm CMOS with Integrated Digital Control Interface B. N. Wicks, C. M. Ta, F. Zhang, P. Nadagouda, B. Yang, Z. Liu, Y. Mo, K. Wang, T. Walsh, G. Felic, R. J. Evans, I. Mareels, and E. Skafidas National ICT
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60-GHz Direct-Conversion Transceiver on 130-nm CMOS with Integrated Digital Control Interface B. N. Wicks, C. M. Ta, ... – PowerPoint PPT presentation
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Title: 60-GHz Direct-Conversion Transceiver on 130-nm CMOS with Integrated Digital Control Interface B. N. Wicks, C. M. Ta, F. Zhang, P. Nadagouda, B. Yang, Z. Liu, Y. Mo, K. Wang, T. Walsh, G. Felic, R. J. Evans, I. Mareels, and E. Skafidas National ICT
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60-GHz Direct-Conversion Transceiver on 130-nm
CMOS with Integrated Digital Control
InterfaceB. N. Wicks, C. M. Ta, F. Zhang, P.
Nadagouda, B. Yang, Z. Liu, Y. Mo, K. Wang, T.
Walsh, G. Felic, R. J. Evans, I. Mareels, and E.
SkafidasNational ICT Australia
(NICTA)Department of Electrical and Electronic
Engineering The University of Melbourne
2
Outline
- Introduction
- Transceiver architecture
- Experimental results
- Conclusions and future works
3
Introduction
- High data-rate applications
- Peer-to-peer between portable devices gt 3 Gbps
- PC connectivity for portable devices
- HDMI cable replacement up to 10 Gbps
- 60-GHz wireless communications
- Unlicensed band
- 7 GHz of bandwidth
- Low-cost semiconductor technology
- CMOS
4
Transceiver architecture
- 130-nm RF-CMOS
- 5 mm 5 mm
- Direct-conversion architecture
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Digital Control Interface (DCI)
- Advanced CMOS technology
- Shorter channel-length, lower power supply
voltage, faster, more power efficient circuits - Analog/RF circuits become more sensitive to PVT
variation - Digital techniques to compensate PVT effect
6
Performance - Transmitter
- Power consumption 515 mW
- Output power 6.5 dBm
7
Performance - Receiver
- Power consumption 54 mW
- Noise figure 11 dB
- iIP3 -13.7 dBm
- Maximum conversion gain 8.1 dB
8
Demonstration
FPGA board
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Conclusions
- Integrated 60-GHz transceiver
- 130-nm CMOS
- Digital control interface
- Demonstration
10
Future works
- 65-nm CMOS
- Phased-array Tx and Rx
- Wire-bond and flip-chip
- RF-ESD
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60-GHz Direct-Conversion Transceiver on 130-nm
CMOS with Integrated Digital Control
InterfaceB. N. Wicks, C. M. Ta, F. Zhang, P.
Nadagouda, B. Yang, Z. Liu, Y. Mo, K. Wang, T.
Walsh, G. Felic, R. J. Evans, I. Mareels, and E.
SkafidasNational ICT Australia
(NICTA)Department of Electrical and Electronic
Engineering The University of Melbourne
