CS 2200 Interrupts - PowerPoint PPT Presentation

1 / 34
About This Presentation
Title:

CS 2200 Interrupts

Description:

Sales Sagging! Lunar Lander 3.0. 8:00. Now with a. built in digital. clock! DSR. DDR. FSM ... Actual procedure is called an exception/trap/interrupt handler ... – PowerPoint PPT presentation

Number of Views:44
Avg rating:3.0/5.0
Slides: 35
Provided by: BillL161
Category:

less

Transcript and Presenter's Notes

Title: CS 2200 Interrupts


1
CS 2200Interrupts
2
Lunar Lander 1.0
3
LC-2200-8 Datapath
8
0
A
LdA
B
LdB
4
prs
8
memory 4096x 8 bits
Addr Din
registers 16x 8 bits
Din
IR15..0
WrREG
WrMEM
2
4
ALU 00 ADD 01 NAND 10 A - B 11 A 1
func
IR4..0
CE
regno
5
Dout
Dout
sign extend
R143..0
4
(No Transcript)
5
Sales Sagging!
6
Lunar Lander 2.0
NOW IN FULL LIVING COLOR
7
FSM CONTROL
DSR
DDR
8
Sales Sagging!
9
Lunar Lander 3.0
800
Now with a built in digital clock!
10
FSM CONTROL
Real Time Clock
DSR
DDR
11
Interrupts
  • What is an interrupt?
  • Idea is an unsolicited procedure call.
  • Actual procedure is called an exception/trap/inter
    rupt handler
  • Why do we need them? Or put another way, what
    would we have to do if we didnt have them?

12
Interrupts
  • How can interrupts be generated?

?
13
Interrupts
  • Different Types (2200 Definitions)
  • Exception - Associated with certain instruction
  • Overflow
  • Illegal Instruction
  • Traps System calls
  • Interrupt - Asynchronous event not associated
    with a certain instruction (e.g. I/O device).

14
Interrupts/Exceptions/Traps
15
Interrupts
  • Hardware
  • System bus contains one or more interrupt lines.
  • Need to know who.
  • Might put device type code on data lines
  • Might put address of table entry
  • Might put address of handling routine
  • May have priority scheme
  • What would priority be based on?
  • How would it work?
  • What has to happen?

16
Interrupts
  • Hardware (Continued)
  • Save the current PC in k0
  • Why k0?
  • Other possibilities?
  • Go somewhere to handle interrupt
  • Check each device
  • Must be quick
  • Interrupt vector table
  • Located in low memory
  • Table of pointers

17
Interrupts
  • Hardware (Continued)
  • What if we get interrupted in the middle of
    handling an interrupt?
  • What do we do when handling interrupt is
    complete?
  • Special Instruction RETI
  • Can a user disable interrupts?
  • followed by
  • while(1)

18
Interrupts
  • Software
  • System call (Monitor call)
  • Why do we need such a construct?
  • Concept of Mode
  • Mode bit
  • User mode
  • Can execute limited instruction set
  • Supervisor or Kernel or Monitor Mode
  • Used by OS
  • Can execute all instructions
  • Switch to user mode before returning to user.

19
Interrupts
  • Interrupt handler code
  • Like a function
  • Pointed to by vector table or address supplied by
    device
  • Must save state of interrupted process

20
Interrupts
Address Bus
Processor
Data Bus
Device 1
Device 2
21
Interrupts
Address Bus
Processor
Data Bus
Int
Device 1
Device 2
Add an interrupt request line. A device wishing
to interrupt asserts this line
22
Interrupts
Address Bus
Processor
Data Bus
Int
Device 1
Device 2
The interrupt line is connected to the processor
control (state machine)
23
Interrupts
Address Bus
Processor
Data Bus
Int
Device 1
Device 2
At the beginning of every instruction execution
sequence a check is made on the status of the
"int" line
24
Interrupts
Address Bus
Processor
Data Bus
Int
Device 1
Device 2
If "int" is asserted special states can be used
to handle the interrupt
25
Interrupts
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
If the processor decides to handle the interrupt
it asserts the inta (interrupt acknowledege) line
26
Interrupts
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
If Device 1 was one of the devices asserting
"int" it receives the acknowledgement and doesn't
pass it on
27
Interrupts
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
If Device 1 wasn't one of the devices asserting
"int" it receives the acknowledgement and passes
it on
28
Interrupts
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
Assume it's Device 2 that wants to interrupt.
29
Interrupts
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
Now knowing that the processor is listening
Device 2 can put the address of it's entry in the
interrupt vector table onto the data bus
30
Interrupts
Memory
0x12345678 0x3579BDFA 0x12345678 0x3579BDFE
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
The interrupt vector table is located in very low
memory and consists of a table of pointers and
stack pointers for interrupt handling routines
31
Interrupts
Memory
0x12345678 0x3579BDFA 0x12345678 0x3579BDFE
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
This allows the processor to jump to the code to
handle the interrupt
32
Interrupts
Memory
0x12345678 0x3579BDFA 0x12345678 0x3579BDFE
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
Once complete the handler executes a "return from
interrupt" instruction
33
Interrupts
Memory
0x12345678 0x3579BDFA 0x12345678 0x3579BDFE
Address Bus
Processor
Data Bus
Int
Inta
Device 1
Device 2
This scheme can also be used with a timer device
which can allow the scheduler to run. In a case
like this there is no return from interrupt
34
Questions?
Write a Comment
User Comments (0)
About PowerShow.com