CS 2200

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CS 2200

• Presentation 11
• Virtual Memory

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At this point...

• You should have a rough idea of how a processor
  works.
• An even rougher idea of how a pipelined processor
  works.
• Some concepts of scheduling should be known to
  you.
• Plus you have been introduced to basic concepts
  involving interrupts and memory management.

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Our Road Map
Processor
Memory Hierarchy
I/O Subsystem
Parallel Systems
Networking
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Five Classic Components
Processor
Memory
Control
Datapath
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Five Classic Components
Processor
Memory
Control
Datapath
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Five Classic Components
Processor
Memory
Control
Datapath
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A word about the bus...
Address Lines
Data Lines
Control Lines
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Five Classic Components
Processor
Memory
Control
Datapath
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What happens...

• When a process is running and it does some I/O?
• Does system call (like an interrupt)
• OS saves state of process and puts in I/O queue.
• Process at head of ready queue gets context
  switched in
• Control passed to active process

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Five Classic Components
Processor
Memory
Control
Datapath
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Quick Review...

• We know that an entire process could be swapped
  out to disk and eventually swapped back in to a
  different place
• We know that a process can be broken up into
  pages and that each logical page can correspond
  to a physical frame using a page table

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Virtual Memory

• Scheme that allows execution of a process that is
  not 100 in memory.

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Advantages

• Allows processes to be larger than physical
  memory
• Abstracts memory so programmers dont have to
  worry about it.

Most of the time
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Background

• Weve seen how memory can be paged
• But doesnt the whole program have to be in
  memory?
• Think about
• Error handling code
• Data structures may be bigger than needed
• Certain operations may not be used

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Background

• Programmer can use all of the address space
• But actual amount used might be smaller so more
  processes at same time
• Improved
• CPU Utilization
• Throughput
• Not improved
• Response time
• Turnaround time

Less I/O so maybe programs will run faster
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Demand Paging

• Paging systems
• Swapping systems
• Combine the two and make the swapping lazy!
• Remember the invalid bit?

Page Table
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Valid/Invalid Bit

• Before
• Used to indicate a page that the process was not
  allowed to use
• Encountering absolutely meant an error had
  occurred.

• Now
• Indicates either the page is still on disk OR the
  page is truly invalid
• The PCB must contain information to allow the
  processor to determine which of the two has
  occurred

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Page Fault
Physical Memory
Operating System
CPU
page table
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Page Fault
?
Physical Memory
Operating System
CPU
page table
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Page Fault
THE SHAFT ?
Physical Memory
Operating System
CPU
page table
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Page Fault
Disk
Physical Memory
Operating System
CPU
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356
356
page table
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Page Fault
Physical Memory
Operating System
CPU
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356
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page table
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Page Fault
Physical Memory
Operating System
TRAP!
CPU
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356
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page table
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Page Fault
OpSys says page is on disk
Physical Memory
Operating System
CPU
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356
356
page table
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Page Fault
Small detail OpSys must somehow maintain list of
what is on disk
Physical Memory
Operating System
CPU
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356
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page table
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Page Fault
Physical Memory
Operating System
CPU
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page table
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Page Fault
Physical Memory
Operating System
CPU
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page table
Free Frame
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Page Fault
Physical Memory
Operating System
CPU
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page table
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Page Fault
Physical Memory
Operating System
CPU
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page table
295
v
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Page Fault
Physical Memory
Operating System
CPU
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Restart Instruction
page table
295
v
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Page Fault
Physical Memory
Operating System
CPU
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356
295
356
page table
295
v
Now it works fine!
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New Hardware Requirements?

• No, not really.
• We needed the valid bit for paging.
• We needed the disk for swapping
• So demand paging is all software!!!
• Well almost!
• What happens when page fault occurs during
  instruction fetch? Memory operation?

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Performance of Demand Paging

• Assume probability of page fault is p
• So 0 ? p ? 1
• Effective access time
• (1 - p) x ma p x pageFaultTime

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Page Fault
OpSys says page is on disk
Physical Memory
Operating System
CPU
Restart Instruction
page table
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Performance of Demand Paging

• Assume probability of page fault is p
• So 0 ? p ? 1
• Effective access time
• (1 - p) x ma p x pageFaultTime
• (1 - p) x 100 p x 25,000,000
• 100 24,999,990 x p
• If p 0.001
• Effective access time 25 ?sec (250xs!)

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Performance of Demand Paging

• If we want only 10 degradation in performance
• 110 gt 100 25,000,000 x p
• 10 gt 25,000,000 x p
• p lt 0.0000004.
• Thus, 1 memory access in 2,500,000 can page
  fault.

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Questions?
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See any problems withPage Replacement so far?
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Page Replacement

• A process may be 10 pages in size but may use
  only half these pages.
• In a multiprogramming environment this means we
  will be able to bring in more processes
• But what if some processes suddenly need their 10
  pages?
• Run out of free frames

Free Frame
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What to do???

• Page fault occurs
• We have no free frames
• Select victim frame
• Write victim page to disk
• Change page and frame tables
• Read the desired page into the (new) free frame
• Change page and frame tables
• Restart the user process.

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Page Replacement

• Notice page replacement requires double the disk
  access
• Remember that 25,000,000???
• We can add a dirty bit indicating that the page
  in memory has been modified.
• Still two key areas for performance
• Page replacement algorithms
• Frame allocation algorithms

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Page Replacement Algorithms

• Goal Minimum page fault rate
• Can test algorithms on random numbers or actual
  sequences of instructions/data
• Only care about different pages

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FIFO

• Maintain queue. As page is read in enqueue. Use
  head of queue as frame to replace
• Sample 1,2,3,4,1,2,5,1,2,3,4,5

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FIFO
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Beladys Anomaly
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FIFO
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Optimal

• Replace the page that will not be used for the
  longest period of time.
• Hah!
• Difficult to implement
• Used as benchmark to compare other algorithms

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LRU

• Assume recent past is an indication of near
  future
• Performance good but how to implement?
• Store counter representing time last used
• Stack of page numbers (doubly linked list)
• Remove page number when used
• Put on top of stack
• Bottom is then LRU

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LRU Approximation

• Add reference bit
• Set when page is accessed
• Additional reference bits algorithm
• Every 100 ms put reference bit into high order
  shifting all bits right and discarding low order
• 00000000 (Not used)
• 11001100
• 00110011

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LRU Approximation

• Second chance
• Maintain pointer to next victim
• Essentially uses FIFO but if reference bit is set
  keep looking.
• As pointer moves it sets reference bit to zero
• If all reference bits are set ends up back where
  it started
• Degenerates into FIFO if all reference bits are
  set

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Counting Algorithms

• Least frequently used
• Replace page with smallest count
• Suffers with page used a lot in the beginning
• Can remedy by periodic shifting
• Most frequently used
• Argument is that LFU has just been brought in and
  has high potential to be used!

Rarely used/expensive/poor performance
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Page Buffering Algorithms

• Maintain a pool of free pages
• Bring the needed page into the pool
• Move the page to be replaced out freeing its
  space for pool
• Maintain list of modified pages
• When device idle write pages and flip dirty bit
  to clean

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Allocation of Frames

• Minimum Number of Frames
• Process must have enough frames to execute any of
  its instructions
• Allocation Algorithms
• Equal allocation
• Proportional allocation
• Global vs. Local Allocation
• Which frames can process select from?

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Thrashing

• Causes
• OS monitors CPU usage
• If CPU usage too low introduce an additional
  process
• Global page replacement is being used
• A process needs a lot of pages and takes them
  from other processes
• These other processes start faulting
• Soon everyone is doing nothing
• OS brings in more processes

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Thrashing

• Working-Set Model
• Define the working set to be the frames the
  process actually needs.
• Make sure the process has enough
• Define a ? or time interval to look back
• If total demand (?wsi) too high suspend
• Page-Fault Frequency
• Frequency too high add more frames
• Frequency too low take away frames

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Other Considerations

• Prepaging
• e.g. Give process back its working set
• Page Size
• Trend is to bigger
• Tradeoff
• Smaller Less I/O, less allocated memory
• Larger Less effect of overhead

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Other Considerations

• Program Structure
• Wait! Something that applies to YOU!
• I/O Interlock
• DMA?
• Two solutions
• Double buffering (disk to system, system to user)
• Locking (Add lock bit)
• Real-Time Processing
• Doesnt work well with RTS
• Have tried mix

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Question

• What works well with Virtual Memory
• Stacks
• Hashed symbol table
• Sequential search
• Binary search
• Pure code
• Vector operations
• Indirection

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Questions?
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