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NOAO MONSOON Image Acquisition System Preliminary Design Review

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Title: NOAO MONSOON Image Acquisition System Preliminary Design Review


1
NOAO MONSOONImage Acquisition
SystemPreliminary Design Review
2
MONSOON Presentation Overview
  • Project Overview Barry Starr
  • IR Science Issues Mike Merrill
  • OUV Science Issues Chuck Claver
  • System Design Barry Starr
  • DHE Design Barry Starr
  • DHE Backplane Gustavo Rahmer
  • Software Design Nick Buchholz
  • Project Status Barry Starr
  • Project Management Issues Barry Starr
  • Discussion

3
Project Overview
  • Barry Michael Starr

4
MONSOON Motivation
  • NOAOs stated mission
  • Facilitate the implementation of the Decadal
    Survey.
  • LSST / GSMT / TSIP / USGP Instruments / Detectors
    Controllers
  • Promote collaboration with external organizations
  • Existing astronomical systems unable to
    adequately support next generation projects due
    to the following limitations
  • Cannot provide high channel counts high
    aggregate data rates
  • Possess high cost/channel high power
    dissipation /channel
  • Existing NOAO systems are
  • Aging varied - currently 7 system types
    supported at KPNO/CTIO
  • Bottom Line MONSOON is in direct support of
    NOAOs mission

5
NOAO Defined Next Generation Systems
  • Large format optical imagers
  • LBNL Mosaic (4k x 4k) 0.4 to 1 µm OUV
  • WIYN QUOTA (8k x 8k)
  • ODI (32k x 32k) 0.4 to 1 µm OUV
  • LSST (40k x 40k) 0.4 to 1 µm OUV
  • Large format IR imagers
  • ORION lab system (2k x 2k) 1-5 µm IR
  • NEWFIRM (4k x 4k) 1-2.5 µm IR
  • GSAOI (4k x 4k) 1-2.5 µm IR

6
MONSOON Fundamental Concepts Image Serveror
Pixel Server
  • Integrated Systems Concept
  • Image Acquisition System vs. Controller
  • Key element in Observatory system
  • More than Interface Electronics
  • Focus on all key issues
  • Signal acquisition
  • Data flow
  • Processing
  • System management
  • Remote location / reliability is of vital
    importance

7
MONSOON Priority Observing Efficiency
  • Maximize open shutter integration time !!!
  • Every photons sacred
  • Telescope time is an increasingly costly
    commodity.
  • Support the relentless acquisition of images.
  • Provide Detector-limited performance
  • Detector costs are a pacing item in system costs.
  • We can and must design systems which do not
    degrade this performance.
  • This can be done at a non-pacing cost/performance
    trade space.

8
MONSOON Fundamental ConceptsDetector-Limited
Performance
  • Detector-Limited implies
  • Noise
  • Read noise
  • Channel-to-channel cross talk
  • Linearity
  • Dynamic range
  • MTF (pixel-to-pixel cross talk, settling time)
  • Readout rate
  • Readout modes, etc.

9
MONSOON Fundamental ConceptsTotal Cost of
Ownership
  • Purchase Costs
  • All components, hardware software, cables,
    power supplies
  • Integration Costs
  • Packaging, cabling, software development,
    documentation development, physical size, weight,
    power and cooling requirements.
  • Maintenance Costs
  • Manpower costs for calibration, troubleshooting,
    replacement time, documentation, organization
    overhead from lack of common systems.
  • Replacement Cost
  • Cost of components, modularity, delivery times,
    control of technology
  • Loss of Science Time
  • Loss of time due to inefficiency, overheads,
    down-time, reliability.

10
MONSOON Vision
  • What if
  • There was a community wide solution to the pixel
    server
  • What if
  • This solution was developed by a distributed team
    of the best in the field
  • What if
  • This solution could work regardless of detector
    technology or institution
  • What if
  • This solution could be implemented with existing
    technology, and low-cost tools
  • What if..
  • It could improve on existing solutions in all
    ways
  • Cost, performance, power, speed, size,
    reliability, calibration, stability
  • What if
  • It could provide a scalable hardware /software
    solution
  • single detector to LSST

Now the good news It can !
11
MONSOON Development Model
  • Full open source development
  • Schematics, artworks, source code
  • Strong internal NOAO collaboration
  • ETS / CTIO / KPNO
  • Strong external collaboration
  • NOAO / ASTEROID Group (Keck / Lick / UCLA /
    Caltech )
  • Steward / SOAR / WIYN / UH / others
  • Monsoon ASTEROID gt MONSTEROID

12
Project Scope Definition
  • MONSOON has designed an architecture to support
    solutions to a large class of image acquisition
    needs.
  • By image we mean all focal plane images.
  • (incl. spectra, wave fronts all other images
    formed on electronic focal planes)
  • We are currently implementing only a small subset
    of these solutions based on need and available
    resources.
  • Capabilities will be added as specific needs are
    defined and resources identified allocated.

13
IR Science Issues
  • K. Michael Merrill

14
The IR Challenge
  • Within the last quarter century, infrared
    detectors have evolved from individual discrete
    devices to high tech aggregates of millions of
    pixels.
  • The scientific drivers for yet more pixels have
    kept apace - already several projects are
    dependent on multiple 2K X 2K arrays to reach
    their goals and next generation facilities
    envision focal planes paved with detector tiles.
  • To service such focal plane composites requires
    sophisticated control of multiple devices, but
    management of the digitized data flow off the
    focal plane through the data pipeline to the
    investigator and the archive looms equally large.

15
  • InSb Array development at NOAO
  • 58X62 (smallest box)
  • 256X256
  • 1024X1024 ALADDIN
  • 2048X2048 Orion
  • NEWFIRM footprint with 4 Orion detector focal
    plane mosaic
  • Science in the raw
  • H2 gas emission (left panel)
  • PAH dust emission (middle)
  • JHK color composite (right)

16
  • High Background Science
  • imaging at the South Pole
  • NGC6334 - PAH,L,M composite
  • relentless observing
  • limited by data flow, not natural background
  • Challenge to excel

17
Multi-wavelength astrophysics with SQIID
simultaneous operation of 4 arrays sharing a
single FOV through dichroics
M17 the Omega Nebula
18
Science/Technology Drivers
  • Astronomy continues to move in the direction of
    larger telescopes, higher spatial/spectral
    resolution instrumentation, and larger image
    fields
  • Science of scale requires measurement of large
    areas of the sky at depth
  • Science of change requires commensurate
    measurements over time
  • Identification and census of rare objects
    requires mining of large areas
  • Need for sample completeness and statistitical
    accuracy requires measurement of multiple sources
    at the same time
  • Scarcity high cost of observing resources
    demands an observing environment that
  • reliably delivers accurately calibrated,
    repeatable observations
  • must be flexible - optimized to meet the diverse
    needs of the science
  • must be adaptable to accommodate changing needs
  • is capable of relentless operation with high
    efficiency
  • Science data flow requires
  • uniformity and efficiency in acquiring,
    processing and archiving image data
  • rapid turnaround of very large data volumes
  • optimal coupling with data processing,
    instrument, and telescope systems

19
NEWFIRM Wide field deep IR imaging in the
large telescope era
NEWFIRM NOAO Extremely Wide Field Infrared Imager
  • Study of growth of structure and complexity in
    the Universe
  • 1-2.4 µm region physically rich, readily
    accessible
  • 8-10 meter telescopes Superb image quality over
    small fields
  • NOAO 4-ms Deep wide surveys fill the 2MASS
    gap
  • Widely recognized need for US system
    competitiveness
  • Variety of specific science programs proposed in
    different venues

20
Galactic IR survey science examples
NEWFIRM NOAO Extremely Wide Field Infrared Imager
  • The stellar initial mass function in molecular
    clouds
  • Complete samples over area, mass, and time
  • Variability as a selection tool enabled by large
    A?
  • Database enables substantial ancillary/follow-up
    investigations
  • Model cloud survey covers 165 sq deg, I J H Ks,
    to Ks 18-20
  • Energy and chemical exchange in molecular clouds
  • Ties between energetic outflows and global
    problems of star formation
  • IR emission lines trace shock and photo-excited
    interfaces in embedded flows
  • Complete sample of outflow population gt local,
    global impact
  • 20 sq degrees per molecular cloud gt 1.64 µm Fe
    II, 2.12 µm H2, 2.17 µm Br ?

21
Extragalactic IR survey science examples
NEWFIRM NOAO Extremely Wide Field Infrared Imager
  • Evolved galaxies and clustering at 2 lt z lt 3
  • Tests for galaxy formation, cosmology
  • Many square degrees, K 22, J 24
  • Young galaxies and quasars at z gt 5
  • Tail end of first episode of primordial star
    formation
  • Small area, very deep, K 23, J 25
  • Linking the local and distant Universe
  • Explore z lt 0.1 clusters at large radii for
    accretions, mergers
  • Tens of square degrees, K 21

22
Gemini Estimated System Background
  • InSb wavelength (0.9 to 5.5 µm) the anticipated
    range in instrumental spectral resolution
    (???????4 to 100,000) span a wide range in photon
    background.
  • Requires operation at both read noise and shot
    noise limits
  • individual instruments often face both
    environments
  • operation at magnifications with a large per
    pixel FOV increases the background
  • operation in conjunction with AO systems
    increases background for ??gt 2 µm
  • Estimated System Background
  • Estimated per unit airmass for the Gemini North
    telescope on Mauna Kea with the f/16 IR secondary
    at 11 magnification 0.05 arcsec/pixel, 1 mm
    PWV, 0C, 2.5 net system warm emissivity, and
    50 net system efficiency.

23
System Background Science Implications
  • Surveys push for an order of magnitude fainter
    sensitivity over wide areas of the sky
  • Most imaging will be background limited
  • 2X fainter takes 4X longer
  • favors accumulation of moderate to short
    exposures to maintain dynamic range
  • Most spectroscopy will be read noise limited
    between the atmospheric emission lines
  • favors array operation which reduces read noise
  • favors array operation which provides
    compensation for baseline drift over long
    integration times
  • Science goals require operation in both read
    noise and background limited environments.

24
System Background Array/Controller Implications
  • Science modes of operation require
  • Relatively rapid pixel handling rates and short
    frame read times
  • Avoid saturation at high background (minimum
    integration time ltlt1 sec)
  • Permit optimal video signal filtering at low to
    moderate background
  • Minimize read noise at low background (multiple
    read pairs required)
  • Operation varied to meet system requirements in
    terms of noise and frame rate (minimum
    integration time and observing efficiency)
  • Reset method (global/ripple/pixel)
  • Readout method (Fast/Fowler sampling/multiple
    digital sampling/etc)
  • Pixel transfer (sub-raster/ROI)
  • Pixel pre-processing (co-addition/reference
    compensation)
  • Must provide multiple distinct operating modes

25
OUV Science Issues
  • Chuck Claver

26
Science of Scale
  • Much of the recent work with large telescopes
    focus on detailed studies of small numbers of
    objects.
  • Follows that we ask how these details apply to
    classes of objects
  • Leads to Science of Scale
  • Decadal Survey has endorsed this concept through
    the LSST.

27
Science of Scale Examples
  • Large Synoptic Survey Telescope
  • 8.4m primary, 3 mirror modified Paul design
  • 3 degree FOV
  • One Degree Imager (3.5m WIYN)
  • 1 degree FOV with 1024 independent OT CCDS
  • 32K x 32K array implements a rubber focal
    surface
  • Independent OT clocking at gt20hz
  • Gemini Multi-Object Spectrograph
  • Concept for wide field spectroscopy of 1000s of
    objects

28
Large-aperture Synoptic Survey Telescope (LSST)
  • NEOs gt300m diameter
  • Dark Matter from Weak Lensing
  • Transient Phenomenon
  • Parallax of the Solar Neighborhood to V27

29
LSST Operation Mode
  • Survey the entire visible sky every 4 nights
  • Requires cadence of 30 seconds
  • 20 sec. exposure
  • 10 sec. overhead
  • Read array
  • Re-point
  • Shutter open-close

30 sec
2s
2s
6s
20s
Exposure
Shutter Open
Shutter Close
Read-out Re-point
30
One Degree Imager (WIYN)
  • 1 degree by 1 degree field on 3.5-m WIYN
  • CCD array 32K X 32K (16 inches on a side) with
    0.11 pixels
  • Orthogonal Transfer CCD technology to do
    tip-tilt correction in CCD (Tonry, Burke,
    Schechter 1997)
  • Predict median seeing to 0.55, 0.45, 0.35 in
    R, I, Z bands
  • Mag limit (S/N10, 1H) in BVRI ? 26.2, 26.1,
    25.9, 25.5

31
ODI Operation ModeThe rubber focal surface
  • Orthogonal Transfer Array, 4k x 4k format with
    12µm pixels
  • 8x8 Independent 5122 OT CCD
  • Guide star positions at 20hz
  • X-Y correction surface maps to individual OT ccds
  • Independent tilt correction on arcrminute scale
    gives rubber focal surface
  • ODI 64 OTAs in a 32k x 32k format.

32
Unique Facilities
  • Unique facilities are costly
  • LSST Instrument est. 30-40M
  • ODI est. 4M
  • On sky time highly valued
  • Demands efficient operation to maximize science
    returns
  • Present day acquisition systems are not capable
    for future science needs
  • Low efficiency
  • Low pixel rates
  • High power consumption
  • Not scalable to the size of system needed

33
System Design
  • Barry Michael Starr

34
Systems Design Approach to MONSOON
  • Investigate requirements,
  • Interview all stakeholders, Astros Tech Staff
    (NOAO / KPNO / CTIO / ASTEROID / LSST /)
  • Analyze and document existing systems
  • Define requirements
  • Evaluate existing solutions/technologies
  • Develop plan
  • Implement plan
  • Deliver system
  • Evaluate project performance

35
MONSOON Application Areas
  • Science Observing
  • Laboratory Detector RD
  • ETS Instrument Development
  • NOAO Technical Imaging
  • Guiders
  • AO Systems

36
MONSOON System Requirements
  • Scalable, low-cost, high-performance system.
  • Support both IR and OUV devices.
  • Detector-Limited performance
  • Maximize open-shutter integration time
  • Device independent data acquisition architecture.
  • Small modular packaging.
  • Low power dissipation.
  • Low total cost of ownership.

37
MONSOON System Data Performance Metrics
  • All data pipelines 32-bit for future expansion
  • Data rates Up to 120Mpixel/sec per controller
    chassis
  • Data processing rates scalable (w/Fiber
    broadcast)
  • Data storage rates scalable (w/Fiber
    broadcast)
  • Data display rates scalable (w/Fiber
    broadcast)
  • of Channels/Controller
  • Up to 216 ch per DHE chassis (w/out Bridge, 8
    Slot backplane)
  • Up to 532 ch per DHE chassis (w/Bridge, 16 Slot
    backplane)
  • of Controllers/System gt100

38
MONSOON ANALOG Performance
  • Current dynamic range gt 60,0001
  • 16-bit 1mhz ADC resolution, supporting S/N gt 90db
  • Future support for higher resolutions
  • Non-linearity lt 0.1 over entire range
  • Read noise lt 10 contribution to total system
    noise
  • Actual input noise and system gain BW set by
    FPA used
  • Channel to channel cross talk lt 0.0015 (16-bit
    resolution)
  • Pixel to pixel cross talk lt 0.01
  • Calibrated, measured, recorded performance.

39
MONSOON Image Acquisition System
  • Scalable multi-channel high-speed Image
    Acquisition System
  • Scalable at all levels based on cost/performance
    trade-offs
  • Specifically designed to address the needs of
  • next-generation IR CCD mosaic systems
  • ORION (2k x 2k) InSb HgCdTe development
  • NEWFIRM (4k x 4k)
  • WYIN QUOTA (8k x 8k) gt ODI (32k x 32k)
  • LSST (40k x 40k) and growing.
  • Increased performance over existing solutions
  • With reduced total cost
  • With reduced size
  • With reduced power consumption

40
MONSOON Scalable Architecture
41
MONSOON System Communications(3 Critical
Networks)
  • 1 GHz (2.4 GHz) COTS fiber optic network
  • Hi-speed, lo-latency
  • 50 Mpixel/s SL100, 120 Mpixel/s SL240
  • Handles all primary communication to Detector
    Head Electronics (DHE)
  • Command/response pixel data
  • Supports point-to-point, loop, and broadcast
    topologies
  • Ethernet
  • Provides backdoor path to DHE for system error
    recovery, diagnostics, and development when fiber
    not active
  • Not intended for any normal mode use.
  • Controller synchronization
  • Key system element, hard-synchronized
    controllers
  • Distributed 40 Mhz master system clock and sync
    pulse
  • Controlled impedance, skew adjusted LVDS signal
    distribution

42
3 Layer System Architecture
  • Supervisor Layer
  • Provide single point contact to system
  • Control only, not pixel data
  • Provides client access security
  • Pixel Acquisition Node (PAN) Layer
  • All low-level data processing (except digital
    averaging)
  • No knowledge of other PAN-DHE pairs
  • Single exposure sequencing
  • (Fowler Sampling, coadds, MSR techniques, OT
    imaging)
  • Detector Head Electronics (DHE) Layer
  • Integration timing (if master)
  • Detector readout sequencing digital avgs.
  • Shutter control array temperature control

43
MONSOON Scalable at Multiple Levels
  • 1) Detector Head Electronics (DHE) Level
  • - Hi-speed standard backplane based-design
  • - Acq channels functionality added as needed to
    support multiple devices / DHE
  • - Adapt to FPA requirements. Analog FPA gt
    digital FPA. No problem!
  • 2) Fiber Optic Link Level
  • - Upgraded from 1 GHz to 2.4 GHz to support reqd
    pixel rate
  • (50 Mpix/s gt120 Mpix/s)
  • 3) Pixel Acquisition Node (PAN) PC Level
  • - Pcs can be upgraded for data processing reqs
    (cpus, memory, network int)
  • 4) Data Processing / Fiber Network Level
  • - Systran supports data broadcast capability to
    support distributed pixel processing
  • 5) System Level
  • - Controller/data acquisition nodes can be added
    to support arbitrarily large systems

44
Visible MOSAIC Development Path
  • QUOTA 8K

45
QUOTA to ODI to LSST System Scaling
QUOTA (ODI 16x) (LSST 20x)
46
MONSOON Designed to Be Built Quickly,
Efficiently, Effectively
  • Heavy Use of COTS Technology
  • Architecture Supports Distributed Parallel
    Development by Multiple Engineering Groups
  • Architecture Supports Existing Controllers for
    Backward Compatibility
  • SDSU II
  • Lick Guider
  • Use of Technologies and Tools Which are Available
    at Modest or No-Cost Now!
  • Clear Definition of Interfaces and Subsystems
  • (Hardware Software)
  • Application of Fundamental System Design Concepts
  • Attention to the Fundamental Laws of Physics as
    Applied to Electronic Systems

47
Interface Definitions
48
MONSOON Key Technologies
  • Low-cost GHzclass PCs
  • Removes the need for embedded DSPs in system, (PC
    cost 2.5k)
  • Scalable commercial high-bandwidth fiber optic
    networks
  • Buy not build, use a well-supported commercial
    product
  • Systran FiberExtreme SL100/SL240
  • SL100 100 Mbyte/s gt 50 ltMpix/s , SL240 240
    Mbyte/s gt 120 Mpix/s
  • Standard software systems
  • Use dependable components with large user base
  • Redhat LINUX
  • Existing software components or systems or design
    patterns?
  • State-of-the art analog mixed signal electronic
    components
  • Increased performance with reduced power, size,
    and cost
  • Allows construction of large channel count systems

49
Low-Cost GHz Class PCs
  • Actual NOAO Benchmarks published at IPAC meeting
    on 4/01
  • 10 Hz rates for co-additions on 2k x 2k images
  • gt 2 Hz rates projected on 4k x 4k images
  • Benchmarks taken with low-cost (2k) modest
    performance Dell 800mhz dual CPU Poweredge 1400
    series workstation

50
SYSTRAN FiberExtreme
  • Embedded CMC Daughter Card ? PCI Board System
  • Multiple network topologies point to point,
    loop, broadcast
  • Actual NOAO benchmarks (8/01),
  • Systran SL100 between two Dell PCs
  • 100 Mbytes/s (50 Mpixel/s) sustained Xfer rates
    for 4K x 4K images

51
MONSOON Advanced Mixed-Signal Analog Components
  • 1/10 the cost, 1/10 the size, 1/10 the power
  • of previous generation hybrid ADC technologies

SDSU-II
Redstar 2 3
  • Multiple devices have been prototyped and
    evaluated
  • NOAO (1/01, to 9/01)

52
Electronics Signal Chain
  • SDSU II Dual Channel Video Board
  • 2 channels
  • 1 Mpixel/sec
  • CDS, 16 bit ADC
  • 15 W power
  • Analog Devices 9826
  • 3 channels (RGB)
  • 15 Mpixel/sec
  • CDS, 16 bit ADC
  • 400 mW power

53
Multiple Engineering Groups Can Develop in
Parallel
  • System design using COTS fiber and cPCI backplane
    means development starts now
  • Modular hardware design with well-defined
    interface means different clock bias boards or
    acquisition boards can be developed
    simultaneously
  • FPGA based bus interface gives added flexibility
    in implementation.
  • Use of low-cost components and tools allows
    minimal investment to participate in design
    effort
  • Break the sequential software development effort

54
System Design AllowsImmediate Software
Development
55
MONSOON Supports Multiple Controllers or DHE
  • The PAN and Supervisor Layers are isolated from
    the details of controller or DHE used.
  • ICD 6.0 has been written to support at least 3
    implementations
  • 1) MONSOON
  • 2) LICK Guider
  • 3) SDSUII

56
Detector Head Electronics (DHE) Design
  • Barry Michael Starr

57
MONSOON Controller Architecture
CPCI Backplane
To FPA
Master Control Board
Clk Bias Board
RABBIT EMBEDDED CONTROLLER
BUS INTERFACE LOGIC
ETHERNET
Sequence Ctl Bus
Serial Cfg Bus
Video Acquisition Board
CLK/SYNC IN
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
N
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
Video Acquisition Board
58
MONSOON DHE W/O Embedded Processor
cPCI Backplane
To FPAs
Master Control Board
Clk Bias Board
RABBIT EMBEDDED CONTROLLER
FPGA To Handle Configuration And Integration
Timing
ETHERNET
Sequence Ctl Bus
Serial Cfg Bus
Video Acquisition Board
CLK/SYNC IN
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
Video Acquisition Board
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
59
MONSOON 3 Board / 3 Bus System
  • 3 Boards
  • 1) Master Control Board (MCB)
  • Common to all monsoon systems
  • 2) Clock Bias Board (CB)
  • Designed to meet FPA needs, 2 or more versions
    planned (IR CCD)
  • 3) Acquisition Board
  • Designed to meet FPA needs, 2 or more versions
    planned (IR CCD)
  • 3 Buses (40-66MHz )
  • 1) 64-Bit Pixel Bus
  • Synchronous transfer of 64-bit pixel data from
    Acq board to MCB
  • 2) Sequencer Bus
  • Hi Speed Timing Bus (MCB to Acq CB Boards) for
    all controller timing
  • 3) Serial Configuration Bus
  • JTAG Serial Configuration Bus to configure read
    back Acq/CB boards

60
MONSOON Controller ArchitectureCCD Focal Plane
(QUOTA)
CPCI Backplane
To OTAs
Master Control Board
CCD Clk Bias Board
RABBIT EMBEDDED CONTROLLER
ETHERNET
Sequence Ctl Bus
Serial Cfg Bus
CCD 16-Ch Acquisition Board
CLK/SYNC IN
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
CCD 16-Ch Acquisition Board
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
61
MONSOON Controller ArchitectureIR Focal Plane
CPCI Backplane
To FPA
Master Control Board
IR Clk Bias Board
RABBIT EMBEDDED CONTROLLER
ETHERNET
Sequence Ctl Bus
Serial Cfg Bus
IR Video Acquisition Board
CLK/SYNC IN
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
IR Video Acquisition Board
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
62
MONSOON Controller ArchitectureHAWAII-2 Analog
Focal Plane
CPCI Backplane
To FPA
Master Control Board
HAWAII-2 Clk Bias Board
RABBIT EMBEDDED CONTROLLER
ETHERNET
Sequence Ctl Bus
Serial Cfg Bus
CLK/SYNC IN
IR 16-Ch Acquisition Board
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
IR 16-Ch Acquisition Board
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
63
MONSOON Controller ArchitectureDigital Focal
Plane
CPCI Backplane
Master Control Board
EMBEDDED CONTROLLER
ETHERNET
Sequence Ctl Bus
To FPA
Serial Cfg Bus
Digital FPA Interface Board
CLK/SYNC IN
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
May Not Be Reqd May Interface Directly to MCB
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
64
MONSOON Controller ArchitectureGuider
CPCI Backplane
To CCD
Master Control Board
Guider Clk/Bias Acq Board
RABBIT EMBEDDED CONTROLLER
ETHERNET
Sequence Ctl Bus
Serial Cfg Bus
CLK/SYNC IN
SEQUENCER LOGIC
FIBER INTERFACE LOGIC
CLK DIST NET- WORK
Pixel Data Bus
CLK/SYNC OUT
SL100
PIXEL PIPE LOGIC
FIBEROPTIC
65
MONSOON Controller Packaging
  • 6U Eurocard format
  • cPCI digital backplane
  • Custom analog backplane

Dewar Vacuum Seal
Focal Plane
66
cPCI Digital Backplane
  • COTS Product Buy Today not Build Tomorrow
  • Avoid Unnecessary Overhead from PCI Bus Protocol
    with Simple 3 Bus Data Path Definition.
  • Use 64-Bit Pixel Bus for gt 120 Mpixel/s Xfer rate
  • Use Reflected Wave methodology
  • Controlled Z, hi-speed environment

67
System Specific Analog Backplane
  • Rigid-flex technology thru the dewar vacuum wall
  • Place all over voltage, ESD protection
    filtering circuitry as close to the focal plane
    as possible to best protect devices
  • Potentially move electronics inside dewar (Clk
    Drivers/Preamps/ADCs ??)
  • New 3-D solid models give necessary detail for
    accurate layouts
  • Almost all new FPAs and CCDs have flex circuit
    interconnects
  • Cost same as PCB, not an issue

Internal Electronics
68
Master Control Board
  • Provides all timing sequencing to system
  • Provides MONSOON system synchronization
  • Employs FPGA (Xilinx Virtex) hardware sequencer
  • 300K gate density, embedded RAM, reconfigurable
  • Provides interface to Systran fiber
  • Fiber handles all primary cmd/response and pixel
    data
  • Provides interface to embedded Ethernet processor
  • Ethernet used for system configuration and
    back-door reset
  • Processor used for system config, housekeeping
    integration timing
  • Does not generate waveforms or touch pixel data
  • Rabbit embedded processor may be removed if
    desired

69
Master Control Board
  • 3 PCBs fabricated
  • 2 Boards assembled
  • FPGA development in process
  • Testing underway

70
Embedded Ethernet Core Processor
  • Rabbit RCM2100
  • 10-base T Ethernet TCP/IP ready
  • 20 MHz CPU, 512K RAM, 512K flash
  • 279 development system
  • lt100 board price
  • EDN top 100 products 2000

71
Systran SL100 Interface
  • Mechanical- simple embedded daughter board
  • Electrical- Front Panel Data Port
  • Simple industry standard 32-bit parallel
    w/handshaking

72
System Synchronization
  • Distributed 40 MHz clock and synch signal
  • LVDS signaling, TWSP cable, terminated
  • Programmable skew compensated lines
  • System hard synched to ns timing
  • Synch signal can be used to
  • Synch controllers to each other
  • External source such as time source, chop signal,
    AO system
  • Synch signal is really serial input line
  • Can be extended to many uses.

73
Clock Bias Board Model
  • Board may be tailored to FPA system reqs
  • All interface to MONSOON bus through FPGA
  • 1) reconfiguration of bus interface signals if
    needed
  • 2) PCI compatible signals
  • 3) room for added functionality lots of
    flexibility
  • All clock voltages bias voltages have read back
  • Most bias voltages clock rails set by Serial
    Cfg Bus
  • IR board will support high-speed parallel DACs
    for some nodes
  • High channel count density on 6U format
  • Advances in CMOS dacs allow 100s of channels on
    6U format

74
Possible Clock Bias Board
QTY 1 8 CHANNEL 12-BIT DAC
BILEVEL CLOCK CHANNELS IN GROUPS OF 4
CLK BIAS FPGA
ADC
QTY 4 EL7457C QUAD DRVR
DAC
ADC
DAC
ADC
DAC
ADC
DAC
LOCAL PATTERN GENERATOR (IF REQD)
16 CLK
ADC
ADC
DAC
ADC
DAC
ADC
DAC
MONSOON BUS INTERFACE LOGIC
DAC
SEQUENCER BUS
3 CTL
16 TTL CLOCK CHANNELS FOR MUX SELECT
SERIAL CFG BUS
16 CLK
DAC INTERFACE LOGIC
QTY 1 12 CHANNEL 12-BIT DAC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
3 CTL
75
Acquisition Board Model
  • All interface to MONSOON bus through FPGA
    provides
  • 1) reconfiguration of bus interface signals if
    needed
  • 2) room for added functionality
  • (digital averaging, dynamic gain select)
  • 3) PCI compatible signals
  • High channel counts on 6U format
  • 36 channel IR board in PCB fabrication
  • Cost power for 36 1mhz IR channels
  • 5W 10W for 36 x 1MHz IR channels ( lt 500mW /
    MHz / ch)
  • lt 5000 component cost (lt 200 / MHz / ch)

76
36-Channel Acquisition Circuitry
36 VIDEO ACQUISITION CHANNELS
3 Channel AFE
ACQ FPGA
GAIN
GAIN
16-BIT ADC
CDS
PGA
GAIN
DATA INTERFACE LOGIC
PIXEL DATA PROCESSING LOGIC
16
X12
FROM CCD OUTPUTS
64 PIXEL DATA BUS
3 Channel AFE
GAIN
GAIN
16-BIT ADC
CDS
PGA
GAIN
16
AFE CLOCKING LOGIC
SEQUENCER BUS

AFE CFG
AFE CFG INTERFACE LOGIC

SERIAL CFG BUS
77
DHE Backplane
  • Gustavo Rahmer

78
MONSOON DHE Backplane Basics
  • ICD 7.0 defines the backplane interface for the
    DHE.
  • Commercial cPCI backplane
  • Max 8 slots (1 System slot and 7 Peripheral
    slots).
  • For more slots, a special bridge is necessary.
  • Less than 8 slots (4 and 6) are available.
  • Compliant to PICMG 2.1 R1.0
  • for independent clock distribution.
  • 6U form factor with 5 connectors
  • 2 digital (P1-P2)
  • 1 analog power (P3)
  • 2 analog signals (P4-P5)
  • Optional 3U form factor (P1-P2 only)

79
DHE Backplane Basics (cont)
80
DHE Backplane Basics (cont.)
81
DHE Backplane Basics (cont.)
  • System slot ? Master Control Board
  • Peripheral slots ? Acq / CB boards
  • Individual Board Select lines to every
    peripheral slot allow to perform
  • Broadcast
  • Multicast (group addressing)
  • Unicast (individual addressing)
  • Individual clock lines to every peripheral slot
  • Each clock line can be individually
    enabled/disabled.
  • Controls system EMI.
  • Lower system power consumption.

82
Sequencer Bus
  • Time-multiplexed bus for clock pattern
    distribution as primary use.
  • Sequencer Bus definition
  • Seq Bus Mode 7 bits
  • Seq Bus Data 32 bits
  • Definition allows flexible use of the bus
  • System configuration and readback.
  • Download of patterns for distributed pattern
    generation.
  • It is used in combination with the Board Select
    lines.

83
Clocking Sequence Example
CLOCK BOARD
ACQ BOARD
15 ns
84
Power Supply Considerations
  • Digital power (5V / 3.3V) present only in P1-P2
    (cPCI standard).
  • Multiple analog voltages defined in P3 for
    maximum flexibility 5V, 6.5V, 15V, 16.5V,
    HV.
  • Individual boards may generate their own voltages
    locally.

85
General Power Scheme
MSTR CTRL BOARD
CLK/BIAS BOARD
ACQ 1 BOARD
ACQ N BOARD

Digital
J1
J1
J1
J1
3.3/5V

J3
J3
J3
Analog
HV
VA
VA1
VA1
VA1
VA2
VA2
VA2
POWER SUPPLIES
BACKPLANE
86
Grounding Considerations
  • Ground pins on connectors are distributed in a
    generous way
  • Digital (P1-P2) 37 pins (cPCI standard)
  • Analog (P3) gt30 pins, plus ground pins in P4-P5.
  • Analog, digital and chassis ground may be
    connected at different locations, according to
    the specific system implementation.

87
General Grounding Scheme

POWER SUPPLIES
MSTR CTRL
BACKPLANE
CLK/BIAS
VIDEO 1
VIDEO N
J1-2
P1-2
P1-2
P1-2
P1-2
Digital
AC Power

Low-Z Conn
Low-Z Conn
Low-Z Conn
Low-Z Conn
Analog
(optional)
J3-4-5
P3-4-5
P3-4-5
P3-4-5
ENCLOSURE
Digital Ground Analog Ground Chassis
Ground Optional Conn.
FPA
88
Software Requirements Architecture Design
Nick C. Buchholz
89
MONSOON Not an Acronym
I give you the Image Acquisition System called
ACRONYM
Array Control Readout Organizer NormallY called
MONSOON
Yclept (I kelpt) (Arch) (OE) to call, called
90
Software Preliminary Design
  • Design Philosophy
  • Primary Design Goals
  • Underlying Assumptions
  • Interface Definitions
  • Requirements
  • Functional Decomposition
  • System State Diagram
  • Data Flow Diagrams

91
Design Philosophy
  • Design the best system possible that meets the
    goals and requirements.
  • Describe the tasks and functions.
  • Choose paradigms to match the tasks.
  • Review the choice in view of the overall design.
  • Choose tools to match paradigms.
  • Design first then implement
  • Document as part of the design process.

92
Primary Design Goals
  • Detector safe operations
  • High observing efficiency (low idle times)
  • Convenient error recovery
  • Extensible to large focal planes
  • Well-defined interfaces
  • Use widely available software technologies

93
Primary Design Goals (cont)
  • Adaptable for updating older systems
  • Lends itself to distributed development
  • Use databases for configuration management
  • Support remote observing
  • Support remote debugging development
  • Easy boot-up and initialization procedures

94
Underlying Assumptions
  • PAN is a PCI Bus system with Giga-Hz class
    CPU(s).
  • Communication by Ethernet connection(s).
  • Linux operating system.
  • Multi-tiered Security Policy.
  • Connection location (firewalls).
  • Connection source (machine name/address).
  • Knowledgeable system (password security).
  • user/process name???.
  • VNC operations issues.

95
Underlying Assumptions (cont)
  • Documentation standards observed.
  • Well-known standard languages.
  • Open Source, on-going development project.
  • Multi-Site distributed development.
  • Source code version control (like Remote CVS).
  • Adopt common design patterns

96
Interface Definitions
  • Client System to Generic Pixel Server.
  • ICD 4.0 Generic Pixel Server - Communications,
    Cmd/Response and Data Stream Interface
    Description.
  • GPX Restrictions on Science Client access.
  • ICD 4.1 MONSOON Command and Parameter
    Restriction Lists.
  • Supervisor Layer to Pixel Acquisition Node.
  • ICD 5.0 Supervisory Pixel Acquisition Node
    Communications, Command/Response Description. (A
    Command Interface).
  • PAN to Generic DHE (Detector Controller).
  • ICD 6.0 Generic Detector Head Electronics -
    Command and Data Stream Interface Description. (A
    Command Interface).
  • MONSOON PAN to MONSOON DHE.
  • NICD 6.1 MONSOON Detector Head Electronics -
    Command and Data Stream Interface Description. (A
    Hardware and Software Details).
  • External published interface
  • Internal interface

97
System Requirements
  • Design must allow.
  • Distributed development.
  • Features added without rebuilding system.
  • Pixel data processing chain re-configurable.
  • Testing and verification considered from start.
  • Components must include a simulation capability.
  • Connection Security of Prime importance.

Protect the Detector.
98
System Requirements (cont)
  • Start-up initialization without intervention.
  • Detector safe start-up.
  • Performs self tests as appropriate.
  • Finishes in ready_for_connection state.
  • Error detection handling.
  • Easy errors return to current configuration.
  • Hard errors return to default configuration.
  • Unrecoverable errors will require human
    intervention.

99
System Requirements (cont)
  • Must include system operations logging.
  • Error detection and recovery logging.
  • Command sequence playback.
  • Support remote diagnosis, debug operation.
  • Command stream based on connections.
  • Multiple connections allowed.
  • Connection security enforced.
  • On-Telescope connection priority observed.
  • Prime connection handles aSyncMessage responses.
  • Need remote power and reset control connection.
  • Engineering Console can steal Prime connection.
  • Engineering level command password protected.

100
System Requirements (cont)
  • Connection mechanism should be universal.
  • Sockets Baselined for connections.
  • Support available on all platforms.
  • Connection takes place to named pixel server.
  • Name - IP address translation by DNS etc.
  • Mosaic Focal Plane Handling.
  • Aim, mosaics to be viewed as single focal
    plane.
  • System should conceal details of exact FP layout.
  • User may elect to deal with individual pieces.

101
System Requirements (cont)
  • Configuration based on database concepts.
  • Keeps record of current configuration for each
    exposure.
  • Configuration info stored in FITS header.
  • Exposure FITS file keyed to unique ID.
  • Configuration displayed in status display.
  • System performance characteristics part of
    database.
  • Configuration multi-tiered.
  • Exposure configuration database available to
    users.
  • Detector configuration database available to
    engineering.
  • Observer can create Menu Selection Modes.
  • Password protection of default configurations.

102
Detector Requirements
  • Detector configuration by named modes.
  • Modes include complete detector configuration.
  • Modes should include definitions for
  • Bias and clock voltage levels.
  • Detector readout speed and method.
  • Data processing method .
  • Detector waveform timing.
  • Selected Parameters may be modified.
  • Selectable Integration time.

103
Exposure Control Requirements
  • Exposure types
  • Photon Capture Object - Internal shutter open.
  • Dark Internal shutter closed.
  • Bias Zero integration time exposure.
  • Reference single IR FPA readout.
  • Separated individual IR frames.
  • Exposure configuration by named Modes.
  • Modes include complete exposure configuration.
  • Exposure Modes include a default Detector Mode.
  • Selected Parameters modified to create new Mode.

104
MONSOON Context Diagram
105
Supervisor Layer Functions
  • Network and client connection control.
  • Network connection security.
  • Connection error detection and recovery.
  • Client communications interface.
  • Command distribution to PANs.
  • Response gathering from PANs.
  • Data transfer control (organizing the transfer).
  • Self start-up and initialization.

106
Pixel Acquisition Node Functions
  • Command verification.
  • Command/Parameter setting security.
  • Parameter name/address translation.
  • Parameter range checking.
  • Diagnosis and debug support.
  • Self-test support.
  • Self Start-up and Initialization.
  • Operations and Error logging.

107
Pixel Acquisition Node Functions (cont)
  • Mid-level exposure control (multiple identical
    images).
  • Configuration Security/Control.
  • Status Tracking.
  • DHE Interface and control.
  • Pixel Data Capture.
  • Data Capture Error Recovery.

108
Pixel Acquisition Node Functions (cont)
  • Self Start-up and Initialization.
  • Image data Pre-processing.
  • Fowler Sampling.
  • Coadding.
  • De-scrambling.
  • Intermediate image storage (FITS image on Disk).
  • Communications Error Recovery.
  • Command Error Recovery.

109
Detector Head Electronics Functions
  • Low Level hardware control.
  • Voltage DAC setting.
  • AFE setup.
  • Shutter control.
  • Timing pattern configuration downloading.
  • Integration timing (if Master node).
  • Housekeeping Status reporting for detector.

110
Detector Head Electronics Functions (cont)
  • Detector Protection.
  • Bias Power control.
  • Hardware test facilities.
  • Error Recovery.
  • Power glitches.
  • Power outages.
  • Electronic component failures.

111
System State Diagram
112
Supervisory Layer DFD Level 0
113
Pixel Acquisition Node DFD Level 0
114
Detector Head Electronics DFD Level 0
115
MONSOON Technical AppendixInterface
RequirementsFlow-down
  • Barry Michael Starr

116
RIO (SBRC) ORION 2k x 2k (InSb/HgCdTe)
  • Readout Channels 64 Channels
  • ReadNoise 20e-
  • Gain (uV/e-) 2
  • Pixel Rate/Output 1.5 us per output
  • Full Well (1 Linearity) 300,000e-
  • Dynamic Range gt 16-bit
  • Image Size 2k x 2k 4M pixels
  • Readout Time 100mS (ORION projected limit, 10Hz
    Frame Rate)
  • Data Rate 4M pix/100mS 40M pix/S (10 Hz
    Rate)
  • Systran SL100 supports 50Mpix/S (10 Hz Rate)
  • Clock Bias Requirements
  • 8 Clocks (-2V to 7V Range)
  • 18 Biases/Clocked Biases (0 to 8V Range)

117
NEWFIRM 4k x 4k IR Imager
Plate 1
118
NEWFIRM FPA Candidates
  • Rockwell HAWAII-2 HgCdTe 4k x 4k implementation
  • Non-Buttable LCC package exists
  • 4-side Buttable package under development
  • Pre Assembled 4k x 4k module under discussion
  • Rockwell Digital FPA HgCdTe 4k x 4k
    implementation
  • Under discussion, interface and packaging TBD
  • RIO (SBRC) Orion (InSb/HgCdTe) 4k x 4k
    implementation
  • 2-Side buttable 2k x 2k package exists
  • Pre-assembled 4k x 4k module under discussion

119
NEWFIRM ImplementationRockwell HAWAII-2 (1-2.5um)
  • Readout Channels 4 x 32 (36) 128 (144)
    Channels
  • ReadNoise gt 10e- (Typically 13-20e-)
  • Gain (uV/e-) 3-6
  • Pixel Rate/Output 4 us per output
  • Full Well 100,000e-
  • Dynamic Range 16-bit
  • Image Size 4 x 2048x2048 16M pixels
  • Readout Time 500mS ( 2Hz Frame Rate)
  • Data Rate 16M pix/500mS 32Mpix/S
  • lt 50M pix/S (SL100 rate)
  • Clock Bias Requirements
  • 13 x 4 52 Clocks (CMOS Inputs, 0-5V Range)
  • 5 x 4 20 Biases (0 to 5V Range)

120
NEWFIRM Implementation RIO ORION (1-2.5um)
  • Readout Channels 4 x 64 256 Channels
  • ReadNoise 20e-
  • Gain (uV/e-) 2
  • Pixel Rate/Output 1.5 us per output
  • Full Well (1 Linearity) 300,000e-
  • Dynamic Range gt 16-bit
  • Image Size 4 x 2k x 2k 16M pixels
  • Readout Time 100mS (ORION projected limit, 10Hz
    Frame Rate) 2.5S (based on 2.5um background
    per R.Probst)
  • Data Rate 16M pix/100mS 160M pix/S (10 Hz
    Rate)
  • Systran SL240 supports 120Mpix/S (7 Hz Rate)
  • Clock Bias Requirements
  • 8 x 4 32 Clocks (-2V to 7V Range)
  • 18 x 4 72 Biases/Clocked Biases (0 to 8V
    Range)

121
NEWFIRM Analog FPA System Diagram
122
NEWFIRM Digital FPA System Diagram
NOAO MONSOON
DEWAR MOUNTED
DETECTOR
CONTROLLER
DEWAR
POWER
CRYOGENIC OPTICAL BENCH
DIGITAL
FPA
FPA
DC POWER
VIDEO
DIGITAL FPA
COLD1
INTERFACE BOARD
HEAD
5V
?(RSC)
FPA
FPA
COLD2
CPCI BACKPLANE
HEAD
FOCAL PLANE ASSY
FILTER
BENCH
GETTER
MECHANISM
TEMP CTL
HTR
VAC
FPA TEMP CTL
GAUGE
MASTER
IR AUXILIARY CONTROL ELECTRONICS
CONTROL
BOARD
ISOLATED
RS
-
232
RABBIT
Ethernet
SYSTRAN
FRONT PANEL
Module
Module
SL100 CMC
24V
ETHERNET(OPTIONAL)
ETHERNET
1Gb/s (50
Mpix
/s) FIBER LINK
OBSERVATORY
CASSEGRAIN CAGE

CONTROLLER
DC POWER
SYSTRAN SL100 PCI
CONTROL ROOM
HP LINEAR
5V
RS
-
232
Ethernet
ISOLATED
PCI BUS
Module
DC POWER
NOAO MONSOON
DETECTOR
DATA ACQUISITION
ETHERNET
COMPUTER
SUMMIT ETHERNET BACKBONE
123
MONSOON for NEWFIRM
124
QUOTA- Quad Orthogonal Transfer Array
  • A new paradigm in large imagers

OTCCD pixel structure
OTA 8x8 array of OTCCDs
Basic OTCCD cell
125
QUOTA-Detector Details Overview
  • Each CCD cell of a 4Kx4K OTA
  • Independent 512x512 CCD
  • Individual or collective addressing
  • 1 arcmin field of view
  • Dead cells excised, yield gt50
  • Bad columns confined to cells
  • Cells with bright stars for guiding
  • 8 output channels per OTA
  • Fast readout (8 amps, 2 sec)
  • Disadvantage -- 0.1 mm gaps, but gaps and dead
    cells are dithered out anyway

5cm
12 um pixels
126
QUOTA (8k x 8k) for WIYNPackage Demonstration
Camera
  • 4-side buttable package w/ multilayer ceramic
    substrate
  • Flexprint to hermetic or
  • through wall
  • Cryocooled bars
  • Four OTAs QUOTA
  • (8K x 8K 15 x 15 arcmin)

127
QUOTA Detector Details Orthogonal Transfer
  • Orthogonal Transfer
  • remove image motion
  • high speed (few usec)

Normal guiding (0.73)
OT tracking (0.50)
128
QUOTA Electronics OTA Control
  • OTA acquisition board(s)
  • Gain
  • CDS/ADC
  • FPGA controller
  • Addresses cells
  • Interprets commands
  • Generates clock patterns

129
QUOTA Electronics Computer Communications
  • Four OTA served by an Interface Unit and Gbit
    fiber
  • Decodes computer commands
  • Synchronizes readout
  • Formats data for computer transmission
  • 64 Mpixel 128 Mb

130
QUOTA Software Tasks
  • Observation shift and guide loop

131
OTA Interface Requirements
  • OTA Image Size 4k x 4k 16M pix
  • OTCCDs/OTA 64 (512 x 512 / OTCCD)
  • Readout Channels 8 Channels
  • System ReadNoise 5e-
  • CCD Output Gain 15-20 uV/e-
  • Pixel Rate/Output 1us
  • Full Well (1 Linearity) 100,000e-
  • Science Readout Time 2s
  • Data Rate Science 8M pix/s

132
OTA Clock Bias Requirements
  • 10 CCD Clocks
  • 5 Serial Clocks ( s1-s3, sw rg) _at_ 1.0MHz Nom.
  • 5 Parallel Clocks (p1-p4, dg) _at_ 200KHz Max
  • 16 Digital Clocks
  • 8 row select lines (rs1-rs8)
  • 8 column select lines (cs1-cs8)
  • 22 Biases
  • 5 parallel standby lines
  • (p1-p4 stdby,dg stdby)
  • 17 video output lines
  • (vdd, otg 8), vrd)

133
OTA Clock Bias Unit Cell (OCBC)
16 BILEVEL CLOCK CHANNELS IN GROUPS OF 4
CMD/SEQ FPGA
QTY 1 12 CHANNEL 12-BIT DAC
QTY 4 EL7457C QUAD DRVR
DAC
DAC
DAC
DAC
PATTERN GENERATOR
CMD LUT
16 CLK
DAC
TO OTA INPUTS
DAC
DAC
BUS INTERFACE LOGIC
DAC
32 DATA IN
3 CTL
16 TTL CLOCK CHANNELS FOR MUX SELECT
CTL
16 CLK
DAC INTERFACE LOGIC
ACQ FPGA COM
QTY 1 12 CHANNEL 12-BIT DAC
3 CTL
FPGA LINK
ACQ CLK
TO ACQ FPGA
134
OTA Output Interface Flow-down
  • System ReadNoise (e-) lt 2.3e- (10 Contribution
    Total System Noise)
  • System ReadNoise (uV) lt 34uV (_at_15uV/e- Min CCD
    Output Gain)
  • Channel Bandwidth gt 20Mhz ( 1us/pix, .01
    settled)
  • Input Ref Noise Density lt 7.5nV/(Hz)0.5
  • Dynamic Range 16-bit (100ke-/2.3e- 50k1)
  • Max Input Voltage Range 2 V (100ke- 20uV/e-)
  • Signal Input Swing, Not DC Offset
  • Note These stay constant for QUOTA and ODI

135
OTA Acquisition Unit Cell (OAC)
8 VIDEO ACQUISITION CHANNELS
ACQ FPGA
GAIN
16-BIT ADC
CDS
PGA
PIXEL DATA PROCESSING LOGIC
16
BUS INTERFACE LOGIC
X 8
FROM OTA OUTPUTS
32 DATA
GAIN
16-BIT ADC
CDS
PGA
16
CTL
FPGA COM
ACQ INTERFACE LOGIC
ACQ CLK
FPGA LINK

FROM CMD/SEQ FPGA
136
QUOTA Interface Requirements
  • QUOTA Image Size 8k x 8k
  • OTAs/QUOTA 4
  • OTCCDs/OTA 64
  • OTCCDs/QUOTA 256
  • Readout Channels 32 Channels (8 x 4)
  • Clocks 40 CCD Clocks (10 x 4)
  • 64 Digital Clocks (16 x 4)
  • Biases 88 Biases (22 x 4)
  • Note Number of Lines May be Reduced w/Common
    Signal Methods
  • Science Data Rate 64 Mpix/2s 32 Mpix/s

137
WIYN One Degree Imager
  • Instrumentation goal for WIYN
  • 64 OTAs ODI
  • (32K x 32K 1 x 1 deg)
  • QUOTA does the RD,
  • different funding for
  • large cryostat,
  • additional devices,
  • filters, shutter, etc.
  • Deployment in 2005

16
138
ODI Interface Requirements
  • ODI Image Size 32k x 32k
  • OTAs/ODI 64
  • OTCCDs/OTA 64
  • OTCCDs/ODI 4096
  • Readout Channels 512 Channels (8 x 64)
  • Clocks 640 CCD Clocks (10 x 64)
  • 1024 Digital Clocks (16 x 64)
  • Biases 1408 Biases (22 x 64)
  • Note Number of lines may be reduced w/common
    signal methods
  • Science Data Rate 1Gpix/2s 512Mpix/s

139
Implementing the Decadal Survey Large Synoptic
Survey Telescope (LSST)
  • 6-8m equivalent aperture
  • 3 degree Field of View (FOV)
  • Curved Focal Plane
  • 1400 1k x 1k CCDs (or ???)
  • National Virtual Observatory (NVO)

140
Focal Plane System Concepts
  • System Level Approach to Design
  • Examine
  • Performance
  • Cost (ComponentSystem)
  • System Complexity
  • Power Consumption
  • Reliability
  • Risk

Picture Courtesy of DMT Website
http//dmtelescope.org/.
141
Key System Issues
  • Integrated acquisition/interface electronics
  • (system interface complexity)
  • Power consumption/dissipation issues/requirements
  • Shutter-less operation
  • Color separation (filters?)
  • Cost / Availability / Reliability
  • Focal plane operating temperature requirements
  • Focal plane metrology issues
  • Low f/number optical systems (fast beams)
  • Form factor (curved focal surface)
  • Pixel scale (spatial sampling, dynamic range)
  • Mosaic issues (4 side buttable, isothermal
    stability)

142
LSST Focal Plane Definition
  • Focal Plane Diameter
  • 55cm (3 deg FOV, f/1.25)
  • Image Plate Scale
  • 51 microns/arcsec
  • Pixel Sampling
  • lt 0.2 arcsec/pixel
  • Focal Plane Curvature
  • 10 m radius of curv.
  • Sagittal Depth 2.6mm
  • Spectral Range
  • 0.3 to 1um

Picture Courtesy of DMT Website
http//dmtelescope.org/.
143
LSST Focal Plane Definition
  • Focal Plane Format
  • Circular mosaic of
  • 1400 1k x 1k Devices
  • Image Size 1.4 Gpixels/image
  • Eq 38k x 38k Mosaic
  • P
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