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Chapters 8

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Title: Lectures for 2nd Edition Author: Tod Amon Last modified by: zhj Created Date: 8/27/1997 8:06:46 PM Document presentation format: – PowerPoint PPT presentation

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Title: Chapters 8


1
Chapters 8 9
  • (partial coverage)

2
Interfacing Processors and Peripherals
  • I/O Design affected by many factors
    (expandability, resilience)
  • Performance access latency throughput
    connection between devices and the system the
    memory hierarchy the operating system
  • A variety of different users (e.g., banks,
    supercomputers, engineers)

3
?????
4
I/O
  • Important but neglected The difficulties in
    assessing and designing I/O systems have often
    relegated (??)I/O to second class
    status courses in every aspect of computing,
    from programming to computer architecture often
    ignore I/O or give it scanty coverage textbook
    s leave the subject to near the end, making it
    easier for students and instructors to skip it!
  • GUILTY! we wont be looking at I/O in much
    detail be sure and read Chapter 8 in its
    entirety. you should probably take a
    networking and/or storage class!
  • relegated ?? scanty ???

5
I/O Devices
  • Very diverse devices behavior (i.e., input vs.
    output) partner (who is at the other end?)
    data rate

6
I/O Example Disk Drives
  • To access data seek position head over the
    proper track (3 to 14 ms. avg.) rotational
    latency wait for desired sector (5K-15K /
    RPM) transfer grab the data (one or more
    sectors) 30 to 80 MB/sec

7
I/O Example Buses
  • Shared communication link (one or more wires)
  • Difficult design may be bottleneck length
    of the bus number of devices tradeoffs
    (buffers for higher bandwidth increases
    latency) support for many different devices
    cost
  • Types of buses processor-memory (short high
    speed, custom design) backplane (??,high
    speed, often standardized, e.g., PCI) I/O
    (lengthy, different devices, e.g., USB, Firewire)
  • Synchronous vs. Asynchronous use a clock and a
    synchronous protocol, fast and small but every
    device must operate at same rate and clock
    skew(???) requires the bus to be short dont
    use a clock and instead use handshaking

8
I/O Bus Standards
  • Today we have two dominant bus standards

9
Other important issues
  • Bus Arbitration daisy chain(???)arbitration
    (not very fair) centralized arbitration
    (requires an arbiter ???), e.g., PCI collision
    detection, e.g., Ethernet
  • Operating system polling interrupts
    direct memory access (DMA)
  • Performance Analysis techniques queuing
    theory simulation analysis, i.e., find the
    weakest link (see I/O System Design)
  • Many new developments

10
Pentium 4- I/O Options
11
Pentium 4
12
?????????
  • ?????,???????????????
  • ????????vs???????????????
  • i?????????????(Standard Parallel
    Port)????(??COM) ??????8????,?????????????1????,?
    ???????
  • ????????????
  • 1981????PC??ISA?????????????,8?,8.33MHz,?????
    286?,???16?,????,??????8.33MHz??????386????
  • 486??,????PCI?VESA????,????(32?)
  • PCI????????????,?????????,PCI???????(25MHz?30MHz?3
    3MHz)?
  • VESA????????,???????
  • PCI??????Pentium??PC?????,??????????????????PCI???

13
?????????
  • ???????????
  • 1????????????
  • ???????????????????,?????????,????????????????????
    ?????,????????,????????????????
  • ??,?????????????????????
  • 2???????????????????????,????
  • ??IEEE 1284????????300KB/s,?RS-232C??????????????
    ?20KB/s,???????????????????,???????????????,?????R
    S-232?????
  • USB,?????????
  • 1995?,?Compaq?Intel?Microsoft?NEC????????USB??????
    ?PC??,1998?????????????
  • USB?RS-232C???100???,?????????????,???????????????

14
?????????
  • USB?????????,??????????????????,???????(differenti
    al signal)????
  • ???????????????????????,????????????USB???????????
    ??????,????????
  • ????????????????????????
  • ?????????
  • ??USB?FireWire,???????????????????,????????????I/O
    ??,????????????????????
  • CPU???????,???????,??????????????????????????????
  • Intel?PCI Express?AMD?HyperTansport??RAMBUS???redw
    ood?I/O????????????????(LVDS)?????????????

15
?????????
  • SATA,???????
  • ?ATA33??,??40??????,????????,???????????
  • ?ATA66??,ATA????????????1?????????????????,???????
    ?????????C2,????????????,??PATA????????????133MHz?
    ?
  • ??,ATA??????????????????
  • SATA?Intel???IDF2000????,??Intel??APT?Dell?IBM?Sea
    gate??Maxtor?????,?2001??????SATA
    1.0??????IDF2002?,SATA 2.0????????
  • SATA????4?????3???,??7?????????SATA
    1.0??,??????150MB/s,?ATA133??133MB/s???????,????SA
    TA 2.0/3.0????300MB/s??600MB/s???????????????,SATA
    ?????????????????

16
?????????
  • FireWire,????????
  • FireWire(??)?1986???????????,1995??????????????(IE
    EE)??IEEE 1394??,?USB???????????????
  • FireWire????????????????????,?????????DV?DC?DVD???
    ??????????????????
  • FireWire????6???,??????????????,????????????SONY??
    ?FireWire????,?????????,?????????????FireWire,????
    i.Link?
  • FireWire??????USB??,??????400Mbps,?????4.5????,IEE
    E 1394b????????????800Mbps,?IEEE
    1394-2000????,???????????????1.6Gbps,?????????????
    ??????100??

17
Fallacies and Pitfalls ?????
  • Fallacy the rated mean time to failure(MTTF
    ??????) of disks is 1,200,000 hours, so disks
    practically never fail.
  • Fallacy magnetic disk storage(?????) is on its
    last legs, will be replaced.
  • Fallacy A 100 MB/sec bus can transfer 100
    MB/sec.
  • ?????????,????????
  • ?????????????????
  • Pitfall Moving functions from the CPU to the
    I/O processor, expecting to improve performance
    without analysis.
  • ??I/O???????I/O?????????CPU

18
Multiprocessors
  • Idea create powerful computers by connecting
    many smaller ones good news works for
    timesharing ????????? (better than
    supercomputer) bad news its really hard to
    write good concurrent programs many commercial
    failures

19
Questions
  • How do parallel processors share data? single
    address space ???? (SMP vs. NUMA-????????)
    message passing(??clusters,?????,?????????)
  • How do parallel processors coordinate?
    synchronization (locks, semaphores ??) built
    into send / receive primitives ????(????)
  • operating system protocols
  • How are they implemented? connected by a
    single bus connected by a network

20
Supercomputers
Plot of top 500 supercomputer sites over a decade
21
Topologies
  • ???????????????
  • ?????????????????????????????
  • ????????????????????????
  • ?????
  • ???????,???-?????????

22
Topologies
23
Topologies
24
Clusters
  • Constructed from whole computers
  • Independent, scalable networks
  • Strengths
  • Many applications amenable (????) to loosely
    coupled machines
  • Exploit (??) local area networks
  • Cost effective / Easy to expand
  • Weaknesses
  • Administration costs not necessarily lower
  • Connected using I/O bus
  • Highly available due to separation of memories
  • In theory, we should be able to do better

25
Google
  • Serve an average of 1000 queries per second
  • Google uses 6,000 processors and 12,000 disks
  • Two sites in silicon valley, two in Virginia
  • Each site connected to internet using OC48 (2488
    Mbit/sec)
  • Reliability
  • On an average day, 20 machines need rebooted
    (software error)
  • 2 of the machines replaced each year
  • In some sense(??????), simple ideas well
    executed. Better (and cheaper) than other
    approaches involving increased complexity

26
Concluding Remarks
  • Evolution vs. Revolution ?????
  • ?????????????,?????????????
  • More often the expense of innovation comes from
    being too disruptive to computer users

27
Concluding Remarks
  • Acceptance of hardware ideas requires acceptance
    by software people therefore hardware people
    should learn about software. And if software
    people want good machines, they must learn more
    about hardware to be able to communicate with and
    thereby influence hardware engineers.
  • ????????-????????????????-?????/?????
  • ????????????,??,????????????????????????????????,
    ??,??????????????
  • ????????????,??????????,????????????????
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