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Instruction formats

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Instruction formats for the PIC series ROM encoding Instructions are encoded in binary in ROM. The instructions are fixed format, each occupying 14 bits. – PowerPoint PPT presentation

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Title: Instruction formats


1
Instruction formats
  • for the PIC series

2
ROM encoding
  • Instructions are encoded in binary in ROM.
  • The instructions are fixed format, each occupying
    14 bits.
  • The division of the bits into fields is flexible.

3
byte oriented register ops
0
6
7
8
13
opcode
d
f ( reg num )
  • when d0 destination W reg
  • d1 destination regf
  • f 7 bit register selector

4
Bit oriented operations
13
10 9 7 6
0
opcode
b
f
  • b 3bit number identifying a bit in an 8 bit
    register
  • f 7 bit number identifying one of 128 possible
    registers

5
Literal ops
8
7
13
0
opcode
KLiteral value
  • These generally operate on the w register
  • The second operand is a value specified in the
    instruction
  • W w op k

6
Control transfer
0
11
10
13
opcode
K
  • Used for call or goto
  • K is a 11 bit literal that specifies an address
    in the program memory

7
Example binary instructions
  • We will look at the binary layout of some of the
    instructions in the instructionset before going
    on to look at the way these are accessed in
    assembler
  • Goto 6

101
000 0000 0110
Binary for goto
Binary for 6
8
Remember about registers
General registers 128 of them
Working or W register
0
Program counter or PC
127
9
Add 3 to W
11 1110
0000 0011
  • Add literal instruction
  • Value to add 3

10
Add register 33 to w
00 111
0
010 0001
Add reg
Destination Is W
Register number Is 33
W W Reg33
11
Add w to register 33
00 111
1
010 0001
Add reg
Destination Is reg 33
This is what Differs from Last Instruction
Register number Is 33
Reg33 w reg33
12
Disadvantages of binary
  • Hard to remember
  • Very hard to remember for complex instructionsets
  • Allows no variation in word lengths between
    different processor models ( PICs come with 12,
    14 and 16 bit instructions )

13
Assembler
  • Replaces each binary instruction with a line of
    text
  • Opcodes replaced by mnemonic names
  • Operands specified as symbolic labels or decimal
    or hex numbers
  • Software package translates to binary

14
Assembler process
15
What assembler looks like
Operands
  • start clrw
  • main movlw 0x35
  • movwf mulplr test 0x35 times 0x2D
  • movlw 0x2D
  • movwf mulcnd
  • call_m call mpy_S The result is in file
  • registers H_byte
    L_byte
  • and should equal 0x0951

comments
opcodes
labels
Comments start with
16
A simple example
  • What we want to compute is
  • Y x5
  • We must associate these variables x,y with
    registers.
  • We must select machine instructions that will
    perform the calculation

17
Assign variables
0
General registers
Special registers
  • X assume it is 8 bit integer
  • We will put it in register 20h
  • We will put Y in register 21h

20h
7f
Register bank
18
Analyse possible data flows
  • W5
  • Wwx
  • Yw
  • YES

Wx Yw Yy5 NO, cant add 5 to y
  • W x
  • Ww5
  • Yw
  • YES

19
Yx5
  • MOVLW 5 w5
  • ADDWF 20h,0 w w reg20h
  • MOVWF 21h yw

0 indicates w is dest
20
Outline the instructions
  • We will now look at the instructionset of the PIC
    processor.
  • There are 35 instructions

21
Register addition
  • ADDWF f,d
  • Add regf to w and store in either w or regf
    depending on d,
  • if d0 then store in w, else in regf
  • If reg24h 6 and w4 then
  • ADDWF 24h,1
  • Sets reg24h to 10

22
Addition of a constant
  • ADDLW const
  • Add const to w and store in w
  • If w4 then
  • ADDLW 24h
  • Sets w to 28h

23
andwf
  • ANDWF f,d
  • And regf with w and store in either w or regf
    depending on d,
  • if d0 then store in w, else in regf
  • If W 0001 1111 and reg20h 1111 0100
  • ANDWF 20h,0
  • will set w to 0001 0100

24
ANDLW
  • ANDLW const
  • And const with w and store in w
  • If W 0001 1111 and const 60000 0110
  • ANDLW 6
  • will set w to 0000 0110

25
Clear registers
  • Clrf f set regf to zero
  • Eg CLRF 40 reg400
  • Clrw set w register to zero

26
MOVE OPERATIONS
  • MOVFW f
  • Moves contents of register f to the W register
  • MOVWF f
  • Moves the W reg to register f
  • MOVLW const
  • Moves the literal constant to the W register
  • Last two letters are memonics FW,WF,LW

27
NOP
  • NOP stands for NO oPeration
  • It is an opcode that does nothing
  • Its binary pattern is

Destinationw
00000
0
0000 0000
This is similar to MOVWF whose pattern is
Destination register
00000
1
FFFF FFFF
Destination bit
28
subtractions
  • This can be done by using complement or subtract
    operations, subtract is not strictly needed
  • COMF f,d
  • This sets either regf or w to regf
  • For example if x is in reg32 and y in reg33
    then xx-y would be done by
  • COMF 33,0 w-y
  • ADDWF 32,1 xxw

29
Complement continued
  • Suppose we want reg32reg33-reg40
  • Initial values 10 7
    4
  • Binary 00001010 00000111 00000100
  • Code Values manipulated
  • Comf 40, 0 00000100 ?111110111 ?11111100 ?w
  • Addwf 33,0 00000111
  • 11111100
  • ?w
  • Movwf 32 ? reg32

Carry bit
00000011
1
00000011
30
SUBWF
  • Subtract w from f
  • SUBWF f,d
  • This has two forms
  • SUBWF f,0 w regf-w
  • SUBWF f,1 regf regf-w

Instead of
Comf 33,0 w-y Addwf 32,1 xxw
MOVFW 33 wy SUBWF 32,1xx-w
31
Decrement register
  • Decf f, d
  • Decrements regf and stores result in either
    regf or w depending on d
  • DECF 50,1
  • Subtracts 1 from register 50
  • DECF 50,0
  • Sets w reg50 -1

32
Decrement and skip
  • DECFSZ f,d
  • Meaning of f, and d fields as before
  • If the result of decrementing is zero, skip the
    next instruction
  • Top
  • some instructions
  • DECFSZ 38,1
  • GOTO Top
  • some other instructions
  • Reg38 holds the number of times to go round
    loop

33
Incrementing
  • INCF and INCFSZ work like DECF and DECFSZ except
    that they increment
  • In this case you would load a negative number
    into your count register and count up towards
    zero.
  • Alternatively, count up, and skip when the result
    would have been 256.
  • Incfsz 50,1 means
  • reg50 reg501
  • if reg50 is 0 then skip next instruction

34
Inclusive or
  • IORWF f,d
  • Example
  • If w1100 0001 and reg400001 0001
  • IORWF 40,0
  • Will set w 1101 0001

11000001 00010001 or 11010001
35
Inclusive or Literal
  • IORLW const
  • Example
  • If w1100 0001
  • IORLW 7
  • Will set w 1100 0111

11000001 00000111 or 11000111
36
Exclusive or
  • XORWF f,d
  • Example
  • If w1100 0001 and reg400001 0001
  • XORWF 40,0
  • Will set w 1101 0000

11000001 00010001 xor 11010000
37
Exclusive or Literal
  • XORLW const
  • Example
  • If w1100 0001
  • XORLW 7
  • Will set w 1100 0110

11000001 00000111 xor 11000110
38
Bit operations
  • BCF f,b set bit b of register f to 0
  • BSF f,b set bit b of register f to 1
  • Eg
  • BCF 34,1
  • Clears bit 1 of register 34

39
Test instructions
  • BTFSC f,b bit test skip on clear
  • BTFSS f,b bit test skip on set
  • Eg
  • INCF 33
  • BTFSC 33,4
  • GOTO OVERFLOW goto overflow when
  • reg 33 gt7

40
GOTO
  • GOTO label
  • Eg
  • GOTO home
  • ..
  • home
  • MOVLW 7
  • .
  • Transfers control to the label

41
CALL and RETURN
  • Thare used for subroutines or procedures.
  • CALL foo
  • .
  • foo start of procedure
  • . body of procedure
  • RETURN end of procedure

42
CALL continued
  • When a call occurs the PC1 is pushed onto the
    stack and then the PC is loaded with the address
    of the label
  • When return occurs the stack is popped into the
    PC transferring control to the instruction after
    the original call.

43
example call source
labels
  • Init
  • call increment
  • goto Init
  • increment
  • incf CountL
  • return

44
Example call and return
at start we have
  • Address opcode assembler
  • 5 2007 CALL 0x7
  • 6 2805 GOTO 0x5
  • 0AA2 INCF 0x22, F increment reg 0x22
  • 0008 RETURN

state of the stack
45
Next step
  • Address opcode assembler
  • 5 2007 CALL 0x7
  • 6 2805 GOTO 0x5
  • 0AA2 INCF 0x22, F
  • 0008 RETURN

stack holds address to return to
46
just before return
47
after return
stack pointer is retracted
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