Project Review Meeting

1
MODERN WP2 MeetingCrolles, 2009 June 22

• T2.4 Review
• (AMS, IMEP, UNET, TUW, UNCA, UNGL)

2
T2.4 Task (1/2)

• Task T2.4 Correlation between PV and
  reliability, reliability modeling
• The impact of process variability on existing
  device reliability degradation models will be
  clarified. Aging measure-ments will be performed
  on test structures Device degradation mechanisms
  will be identified based on silicon, their effect
  on PV parameters will be characterized and
  modeled to allow for a better description of
  aging during operation.
• Partners AMS, IMEP, UNET, TUW, UNCA, UNGL
• UNGL will develop methodologies for the
  simulation of the statistical impact of NBTI and
  hot carrier degradation on the MOSFET
  characteristics in concert with the statistical
  variability sources described in T2.2 and its
  capture in statistical compact models. UNCA will
  perform aging measurements on nano-MOSFET devices
  focusing on the three main reliability
  mechanisms hot-carrier injection,
  bias-temperature instability and time-dependent
  dielectric breakdown. The impact of process
  variation (e.g. line edge roughness, random
  dopant distribution, non-homogenity of the gate
  dielectric) on the device reliability will be
  investigated and potential solutions will be
  proposed. Aging models will be developed to
  predict device lifetime dependence on the
  statistical fluctuations of geometrical and
  technological parameters of nano-MOSFET. Model
  parameters will be calibrated with the hardware
  results of aging measurements. UNET will work on
  methodologies to design reliability experiments
  that allow characterizing the impact of PV on
  test structures, single cells or simple arrays,
  on 45nm 32nm planar CMOS, and on Non-Volatile
  Memories. It will include the development of
  compact models including aging effects. AMS will
  execute lifetime measurements necessary for model
  development and the usage in SPICE simulators in
  0.13um, 0.18um and 0.35um CMOS and HV
  technologies. The objective is to develop silicon
  based models for PV and reliability correlation.
  Lifetime measurements will be performed on
  appropriate test structures. Based on that data
  set, PV-aware parameter degradation models for
  NBTI and HCI effects will be developed at TUW.
  Since in particular degradation caused by NBTI is
  known to recover quickly once the stress is
  removed, emphasis will be put on a proper
  description of the dynamical properties of the
  degradation.

3
T2.4 Task (2/2)

• Task T2.4 Correlation between PV and
  reliability, reliability modeling (cont)
• With future technology nodes it is becoming more
  and more critical to consider statistical and
  deterministic variations for ensuring the design
  goal at time of manufacturing as well as for the
  proposed lifetime. IMEP will investigate based on
  mixed mode TCAD simulation and on analytical
  models the SBD/BD failure occurrence impact at
  device level on device characteristics and at
  elementary circuit level on subsequent circuit
  functioning. These studies will be extended to
  new device architecture featuring thin silicon
  film (MugFET, GAA), which will be benchmarked in
  term of reliability robustness to bulk devices.
  This will require a detailed analysis of the
  SBD/BD occurrence and characterization on actual
  FD-SOI or GAA devices. The work will be carried
  out in collaboration with STF2.

4
Reliability T2.4 Deliverables
Ref Deliverable/ Contributors Due date
D2.4.1 Specification of considered degradation effects, modeling approaches and device parameters (UNGL, TUW) M6
D2.4.2 Hardware results of aging measurements available, on planar bulk CMOS technologies (AMS, TUW, UNET, UNCA) M24
D2.4.3 Implementation of statistical degradation effects into aging models, hardware calibration of degradation effects (IMEP, AMS, TUW, UNGL, UNET, UNCA) M33
Task Leader Jong-mun.park_at_austriamicrosystems.com
 
5
T2.4 Task List

• AMS Lifetime measurements necessary for model
  development 0.18um and 0.35um CMOS and HV
  technologies.
• IMEP Lhe impact of process variability on
  existing device reliability degradation models
  will be clarified. Aging measure-ments will be
  performed on test structures Device degradation
  mechanisms will be identified based on silicon,
  their effect on PV parameters will be
  characterized and modeled to allow for a better
  description of aging during operation.
• Partners AMS, IMEP, UNET, TUW, UNCA, UNGL
• UNGL will develop methodologies for the
  simulation of the statistical impact of NBTI and
  hot carrier degradation on the MOSFET
  characteristics in concert with the statistical
  variability sources described in T2.2 and its
  capture in statistical compact models. UNCA will
  perform aging measurements on nano-MOSFET devices
  focusing on the three main reliability
  mechanisms hot-carrier injection,
  bias-temperature instability and time-dependent
  dielectric breakdown. The impact of process
  variation (e.g. line edge roughness, random
  dopant distribution, non-homogenity of the gate
  dielectric) on the device reliability will be
  investigated and potential solutions will be
  proposed. Aging models will be developed to
  predict device lifetime dependence on the
  statistical fluctuations of geometrical and
  technological parameters of nano-MOSFET. Model
  parameters will be calibrated with the hardware
  results of aging measurements. UNET will work on
  methodologies to design reliability experiments
  that allow characterizing the impact of PV on
  test structures, single cells or simple arrays,
  on 45nm 32nm planar CMOS, and on Non-Volatile
  Memories. It will include the development of
  compact models including aging effects. AMS will
  execute lifetime measurements necessary for model
  development and the usage in SPICE simulators in
  0.13um, 0.18um and 0.35um CMOS and HV
  technologies. The objective is to develop silicon
  based models for PV and reliability correlation.
  Lifetime measurements will be performed on
  appropriate test structures. Based on that data
  set, PV-aware parameter degradation models for
  NBTI and HCI effects will be developed at TUW.
  Since in particular degradation caused by NBTI is
  known to recover quickly once the stress is
  removed, emphasis will be put on a proper
  description of the dynamical properties of the
  degradation.

6
T2.4 Review (2/1) (AMS, IMEP, UNET, TUW, UNCA,
UNGL)

• Activity done so far
• Collect experimental data in order to develop a
  physically based degradation model for HCI and
  NBTI
• LV MOS first, HV MOS final goal (AMS, back-up
  slides)
• Measurement done on golden wafers (? PV is
  neglected, AMS)
• The initial NBTI results from the model are
  validated against the numerical results (TUW,
  back-up slides).
• Well established methodology for simulation of
  statistical aspects of NBTI (UGLA, back-up
  slides)
• Survey of requirements for statistical
  reliability simulation (UGLA)
• UNCA Needs samples from industrial partners.
  Collaboration with ST-I
• IMEP Collaboration with STF2
• UNET Collaboration with STF2
• Plan for D2.4.1 deliverable
• Discuss with T2.5 the most interesting devices
  for the demonstrator, with T2.1 the process
  parameters to take into account.
• Initial physics-based analytical model for NBTI
  to implement in circuit simulator
• Survey of degradation effects TUW, UGLA
• Time dependent modeling of degradation TUW
• Statistical modeling of degradation UGLA

7
T2.4 Review (2/2) (AMS, IMEP, UNET, TUW, UNCA,
UNGL)

• Issues
• Near term (for D2.4.1 deliverable) none
• Mean term
• How to measure PV influence on reliability?
• How to include PV in a reliability model?
• Experimental results which captures the dynamics
  like recovery, bias dependence of recovery, etc.
  to validate the models
• Find a correlation between parameters related to
  reliability and process variability.
• Interaction need with other WP, if any
• Statistical simulation of variability and
  reliability are connected
• Simulated and measured devices are identical!

8
T2.4 Back-up slides
9
Devices (AMS)
H35- NMOSIM (LV)
H35- NMOS50M (HV)
Max VD 5 V
Max VG 5 V
Channel length 0.45-10 um
Channel width 0.4-10 um
Oxide thickness 155 Å
Max VD 50 V
Max VG 5 V
Channel length 0.5-10 um
Channel width 0.5-10 um
Oxide thickness 155 Å
10
Current HCI model (AMS) Modified Hu model
HV
LV
T-40 ?C
11
Well established methodology for simulation of
statistical aspects of NBTI (UNGL)
12
Well established methodology for simulation of
statistical aspects of NBTI (UNGL)
13
Analytical Model for NBTI (TUW)
14
Validation of the Model (TUW)