Title: Heterostructure Silicon (including Lecture-Tutorial-Laboratory Modules)
1Heterostructure Silicon (including
Lecture-Tutorial-Laboratory Modules)
- Dept. of Electronics ECE
- Indian Institute of Technology-Kharagpur
First R D Centre in Information and
Communication Technology (ICT) Development among
IITs and Universities in India PI Prof. C. K
Maiti, Co-PI Prof A. S Dhar, and Prof A. Halder
2Research Development focus
- To develop e-learning materials for
Heterostructure Silicon Course (including
tutorial and laboratory modules) for final year
undergraduates and postgraduate students and
implement online simulation laboratory real
time simulation laboratory accessed through the
Internet which can expand the range of simulation
experiments in Heterostructure Silicon, transmit
online instructions and study materials for
anyone, anywhere and anytime. - development of e-content for an integrated
teaching environment which allows for the
provision of online live lectures (a 40-lecture
module with tutorials) and a laboratory (10-12
simulation experiments) session for
geographically dispersed students.
3Steps for Development of RealTIME
Measurement-based Internet Laboratory Design of
Experiment Remote Operation of the
Instruments (via LabVIEW, IC/CV lite, Easy
Expert, VEE etc) Conversion to Web
Application Launching on the Internet
4Total Budget Outlay
(Rs. in lakhs) Years Head 1st 2nd
3rd Total Capital Equipment Rs. 30.00 - - 30.00
FE Comp. Consumable stores
Rs. 10.00 10.00 10.00 30.00 Software/License
Fee Duty on import (if any) Rs. nil nil nil nil
Manpower (JPA/RS/Eqv.) Rs. 7.00 8.00 9.00 24.00
Travel Training Rs. 3.00 4.00 5.00 12.00
Contingencies/Accessories Rs. 10.00 13.00 16.00
39.00 Grand Total (FE Comp.)
60.00 35.00 40.00
135.00 Grand Total
Rs. 135.00 lakhs
5Course Description
Text Book C. K. Maiti, S. Chattopadhyay, and L.
K. Bera, "Strained-Si Heterostructure
Field-Effect Devices", CRC Press(Taylor and
Francis), USA, 2007. 40-50 lectures including
tutorial based on the following contents
Introduction Strain Engineering in
Microelectronics Stress Induced During
Manufacturing Substrate Engineering Uniaxial vs.
Biaxial Strain Engineering Heteroepitaxy and
Strain Control Virtual Substrates Hybrid
Substrates
6Substrate-Induced Strain Engineering Process-Induc
ed Stress Engineering Global vs. Local
Strain Substrate-Induced Strain Characterization
of Strained Layers Gate Dielectrics on Engineered
Substrates Kinetics Oxidation of Si1-xGex
Layers Oxidation of Strained-Si Layers Rapid
Thermal Oxidation Plasma Nitridation of
Strained-Si High-k GateDielectrics on
Strained-Si Nonclassical CMOS Structures Electroni
c Properties of Engineered Substrates Orientation-
Dependent Mobility Engineering Energy Gap and
Band Structure Electron Mobility Hole
Mobility FieldDependence
7Doping Dependence Carrier Lifetime Heterostructure
Field-Effect Devices SiGe/SiGeCMaterial
Parameters SiGe Hetero-FETs Structures
andOperation SiGe p-MOSFETs on SOI SiGeC
Hetero-FETs SiGe-based HEMTs Design
Issues Strained-Si Technology Process
Integration Uniaxial Stress Process Flow Biaxial
Strain Process Flow Strain-Engineered
Hetero-FETs Modeling and Simulation Simulation
of Hetero-FETs Strained-SiMaterial Parameters
forModeling Simulation of Strained-Si
n-MOSFETs Characterization of Strained-Si
Hetero-FETs SPICE Parameter Extraction
8VLSI Engineering Laboratory Module will consist
of the following experiments
- Doping Profile Determination
- Bipolar Device Characterization
- MOS Capacitor Characterization
- MOSFET Characterization
- High Frequency Characteristics of BJT
- MOSFET SPICE Parameter Extraction
- Bipolar Transistor SPICE Parameter Extraction
- 1/f Noise Characterization in Transistors
- Low Temperature Characterization of Transistors
- LNA Characterization
- Noise Modeling in MOSFETs
- Cutoff Frequency Determination
9Why Heterostructure Silicon ?March of Technology
- MOORES LAW Transistor density on integrated
circuits doubles about every two years Intel
co-founder Gordon E. Moore (1965) - Microelectronic silicon computer chips have
grown from a single transistor in the 1950s to
hundreds of millions of transistors per chip on
todays microprocessor and memory devices
10March of Technology
- Geometric scaling of transistors Making Moores
prediction true - 90-nm technology ? 65-nm technology ? 45-nm
technology ? 32-nm technology - HALT IN MARCH ?
- Performance Degradation for smaller gate lengths
- Physical limits in scaling
11March of TechnologyHeterostructure Engineering
- Heterostructure Engineering Will ensure Moores
law continues to hold true - Novel solution to enhance device performance by
inherently increasing the mobility of the charge
carriers by straining the MOSFET channel
12Strained-Si Epitaxial Layers
2-D lattice view of Tensile strained-Si film
Vegards law aSiGe(x)aSi(1-x)aGe(x) x Ge
fraction aSi5.43 Å aGe5.66 Å
13Band Structure of Tensile Strained-Si
(b) Band structure of bulk Ge
(a) Band structure of bulk Si
(c)
14What is Technology CAD (TCAD)Rising
Technological Complexity
Gate insulator SiO2/HiK Leakage Trapping
Gate Work function Depletion
Channel Mobility
Raised S/D Material Activation Diffusion
S/D extension Activation Junction (USJ)
Device Scaling More Simulation Needed
Application Design, analyze and optimize
semiconductor technologies and devices
15Compact multi-level technology/
transistor/subsystem TCAD modeling flow
16Advanced TCAD Simulation
- Process Simulation Updates
- Device Simulation Updates
- BSIM4 Model Extraction
- Process Optimization using process compact model
(PCM) - Sensitivity, uncertainty yield analysis (Yield
Management)
17TCAD Optimization and Manufacturability
18Sensitivity, uncertainty yield analysis
Determine the most stable process condition
19Yield analysis
Device spec limits
20Some Strained-Engineered Devices
21Some available facilities Hardware facilities
ELVIS Setup
NetLAB Server
22Network Analyzer
Noise Figure Analyzer
Spectrum Analyzer
DC Probe station
23AFM Setup
Agilent Semiconductor Test Analyzer
24Software facilities
- Instrument Control software
- LabVIEW, VEE, VSA, IC-CAP, IC/C-V light,
EasyExpert, Microsoft Inst., etc. - TCAD software
- SILVACO, Sentaurus, MEDICI, TSupreme, Taurus,
Monte Carlo, HSPICE, Nanosim, PCM studio,
PARAMOS, etc.
25Requirements List of Equipment
- Four Probe Resistivity Meter (25 lakhs)
- Mask Aligner (75 lakhs)
- Clean Air station (20 lakhs)
- Rapid Thermal Annealing System (45 lakhs)
- Semiconductor Test System (35 lakhs)
- Microwave/ECR Plasma System (55 lakhs)
- DC/RF Sputtering System (45 lakhs)
- Probe station (50 lakhs)
- Programmable power supply (20 Lakhs)
- Thickness Measurement system (30 lakhs)
- AFM/STM (30 lakhs)
- Spectrum analyzer (10 Lakhs)
- LCR Meter (10 lakhs)
- Semiconductor Parameter Analyzer (50 lakhs)
- Noise Figure Analyzer (55 lakhs)
- Network Analyzer up to 26 GHz with calibration
kits (200 lakhs) - Parameter extraction and device/process modeling
software tools (45 lakhs)
26Achievement in ICT Area
- NetLAB based Measurement and Analysis
- First On Line Laboratory Demonstration at Andhra
University (AU) - First short term course on Information
Communication Technology (ICT) on Hardware
Laboratory at IIT-Kharagpur - Arranged several short term courses on Technology
CAD (TCAD) at IIT-Kharagpur - Arranged several short term courses on Technology
CAD (TCAD) outside IIT-Kharagpur
27Book Published
- 1. Applications of Silicon-Germanium
Heterostructure Devices, Institute of Physics
Publishing (IOP), UK, 2001. - 2. Silicon Heterostructures Materials and
Devices, Institute of Electrical Engineers (IEE),
UK, 2001. - 3. Selected Works of Professor Herbert Kroemer,
Edited, World Scientific, Singapore 2008. - 4. Strained-Si Heterostructure Field-Effect
Devices, CRC Press, London, 2007. - 5. TCAD for Si, SiGe and GaAs Integrated
Circuits, IET, UK, 2008.
28OUR Publications on INTERNET LABORATORY on
MICROELECTRONICS
- A. Maiti and S. S. Mahato, Online Semiconductor
Device Characterization and Parameter Extraction
Using World Wide Web, Proc. NCNTE, Feb. 29 Mar.
01, pp.160-163, 2008. - A. Maiti and S. S. Mahato, Web-based
Semiconductor Technology CAD (TCAD) Laboratory,
50th Intl. Symp. ELMAR-2008, Zadar, CROATIA,
10-12 September 2008. - A. Maiti and S. S. Mahato, Web-based
Semiconductor Process and Device Simulation
Laboratory, Proc. of ICEE2008, Intl. Conf. on
Engineering Education, "New Challenges in
Engineering Education and Research in the 21st
Century", PÉCS-BUDAPEST, HUNGARY, JULY 27-31,
2008. - S. C. Pandey, A. Maiti, T. K. Maiti and C. K.
Maiti, Online MOS Capacitor Characterization in
LabVIEW Environment, International Journal of
Online Engineering (iJOE), vol.5, pp.57-60, 2009. - A. Maiti, M. K. Hota, T. K. Maiti and C. K.
Maiti, Online Microelectronics and VLSI
Engineering Laboratory, International Workshop on
Technology for Education, Bangalore, Aug 04-06,
2009.
29Currently Available Experiments via INTERNET from
IIT-KHARAGPUR(RealTIME Online Measurement-based)
- Gummel Plot of a BJT
- Output Characteristics of a BJT
- Threshold Voltage of a MOSFET
- Output Characteristics of a MOSFET
- MOSFET Parameter Extraction
- BJT SPICE Parameter Extraction
- Low Noise Amplifier Characterization
- Surface Analysis using AFM/STM
- Circuit Analysis Using NI-Elvis
30NetLAB Webpage
31(No Transcript)
32(No Transcript)
33Partner/USER Institutions
Our Current Partners are VIT, Vellore NIST,
Berhampur OUR ONLINE LABORATORY HAS BEEN USED
and TESTED BY More Than 50 ENGINEERING
COLLEGES and 10 UNIVERSITIES
34Short Term Course/Workshop AICTE/MHRD sponsored
SUMMER SCHOOL at IIT KHARAGPUR May 17-23,
2009 Applications of ICT for Hardware
Laboratory 52 participants from 40 Engineering
Colleges
35List of Participating Institutions
- VIT University, Vellore
- NIST, Berhampur
- West Bengal University of Technology, Kolkata
- University of Calcutta
- Inst. of Radiophysics and Electronics
- North Bengal University, Siliguri
- NIT, Durgapur
- Bengal Engg. and Science University, Shibpur
- Tezpur (Central) University, Tezpur
36- IMPS College of Engg. and Technology, Malda
- Gurgaon College of Engg., Haryana
- Hi-Tech Institute of Technology, Khurda
- National Institute of Technology, Warangal
- SSN College of Engg., Tamilnadu
- Synergy Institute of Engg. and Technology,
Dhenkanal - Medi-caps Institute of Technology Management,
Indore - Dr. BR Ambedkar National Institute of Technology,
Punjab - Jaypee Univ. Of Information Tech., Solan, H.P.
- Dronacharya College of Engg., Gurgaon, Haryana
- CVR College of Engg., Hyderabad, A.P.
- Sai Spurthi Institute of Technology, A.P.
- Lingaya's Institute of Mgt and Technology,
Faridabad
37- Purushottam Institute of Engg. Tech., Rourkela,
Orissa - National Institute of Science Technology,
Orissa - Hi-Tech Institute of Tech., Orissa
- GLAITM, Mathura, U.P.
- Dr. B. C. Roy Engg. College, Durgapur
- Tradient Academy of Tech., Orissa
- Modern Engg. Management Studies, Orissa
- GLA Institute of Tech. Management, Mathura
- Synergy Institute of Engg. Tech., Orissa
- ITER, Bhubaneswar
- Synergy Institute of Engg. Tech., Orissa
- DRIEMS, Cuttack
- Lingayas University, Faridabad
- Birla Institute of Technology, Patna
- Dr. Sivanthi Aditanar College of Engg., Tamilnadu
38- PSN Group of Institutions, Tamilnadu
- Orissa Engg. College, Bhubaneswar
- JIET, Cuttack
- Raajdhani Eng. College, Bhubaneswar
- World Institute of Technology, Gurgaon
- Dept. of Bio-Medical Engg., Andhra University
- Andhra University College of Engg., Visakhapatnam
- GITAM University, Visakhapatnam
- Chaitanya college of Engg., Visakhapatnam
- SRKR Engg. College, Visakhapatnam
- Govt. Polytechnic, Bheemili
- Sanketika Vidya Parishad Engg. College,
Visakhapatnam - JNTU College of Engg., Hyderabad
- National Engg. College, Tamilnadu
- Institute of Technology and Management, Gurgaon
39Thank You