Title: SPEAKING PARTNER: AN ARM7BASED MULTIMEDIA HANDHELD DEVICE Wonyong Sung, Hoseok Chang, Wonchul Lee, S
1SPEAKING PARTNER AN ARM7-BASED MULTIMEDIA
HANDHELD DEVICEWonyong Sung, Hoseok Chang,
Wonchul Lee, Suhong Ryu
- School of Electrical Engineering
- Seoul National University
- Wonyong Sung
- Oct. 17, 2002
2Contents
- Introduction
- Software optimization techniques
- Implementation of MP3 Audio decoder
- Implementation of speech recognition
- Power consumption of the system
- Conclusion
3Introduction
- Speaking Partner
- Handheld educational device for kids
- Animation, MP3 playback, speech recognition
2,9 240160 black and white 16-gray STN LCD
128Kbyte, System ROM
Or Smart Media Card(SMC) Store programs
contents, Used as a solid-state hard-disk
60 MHz, 8KB unified cache memory
4Software Implementation
- Implementation
- MP3 audio decoding
- Speech recognition
- Animation(LZW image compression)
- Using a simple real-time operating system
Tasks
Top priority jobs
5Software Optimization(1)
- Based on 32bit RISC processor
- ARM7TDMI
- 328 bits multiplier
- No support DSP specific features
- Hardware loop control, automatic address
generation, multiple buses - Need to optimize the computation intensive
algorithms - MP3 decoding, speech recognition
- Low level optimization
- Using ARM CPU specific features
6Software optimization(2)
- ARM7TDMI
- A fairy large number of registers(31)
- Reduce the memory access, good compiler
performance - Conditional execution
- Reduce control overhead
- 32bit barrel shifter
- Execute shift/rotation with ALU operations
- Block load/store transfer instructions
- Need to convert the floating-point version to
fixed-point one - Using automatic scaling method
- Optimization
- Algorithm optimization
- Loop transformation
- Using ARM CPU specific features
7Implementation of MP3 Decoder
- MPEG 1/2 Layer-III(MP3) algorithm
- Subband synthesis, IMDCT, requantization
- gt 85 of processing time
- Huffman decoding, Unpacking scale-factor
- gt control intensive part
- Inverse Modified Discrete Cosine Transform(IMDCT)
- Britanak Rao algorithm
- Using low level optimization
- Block transfer instructions(LDM/STM)
8IMDCT
- Reducing multiplier accuracy vs. using block
transfer - A -gt B 17.8
- B -gt C 8.1
SNR 3232 bits 91.61dB 3216 bits 82.45dB
The effect of reducing the data memory gt the
effect of reducing the precision for multiply
9Implementation of Speech recognition
- Connected word speaker independent
-
8KHz(12bits), 12th order LPCC
Pattern recognizer, Hidden Markov Model
Viterbi algorithm Beam-pruning gt reduce total
execution time about 60
Recognition unit word Small vocabulary size
Examine just the previous word Reduced the
latency of recognition, small storage
10Profiling results
- Using software optimization methods
- Loop transformations
- Post increment/decrement conversion
- 16 bit multiplications
- Test
- 215 word-set
- Over 90 recognition rate
Execution time gt Reduced about 30 45
11Power Consumption
- The system is operating using two AA-size 1.5V
batteries - Most digital analog circuits 3.3V
- CPU core 2.5V, LCD 21V, Audio amp 150mW
Current consumption according to the activity
Current consumption at each H/W block
12Conclusion
- MP3 decoding, speech recognition, animation
- Implemented in software using ARM7TDMI
- Lacks of features in programmable digital signal
processors - Need software optimization techniques
- The effect of reducing the data transfer
- gt the effect of reducing the precision for
multiply - Power analysis
- Current consumed at the DRAM
- Current consumed at the CPU core
- gt reducing cache miss is most important for
lowering power consumption