Introduction to VLSI Programming High Performance DLX

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Introduction to VLSI Programming High
Performance DLX

• (course 2IN30)
• Prof. dr. ir.Kees van Berkel

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Demonstrator ICs
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Added value

• 1985 modularity, ease of design (no value
  added to product!)
• 1990 low power (ESPRIT project ?????)
• 1992 low noise, low EME
  (Electro-Magnetic Emission)
• 2000 ...

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Added value low power DCC Error Corrector
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A sync-async arms race
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Added value Low Power
Synchronous 80C51 - Asynchronous 80C51
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Added value Low EM Emission
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Roadblock circuit sizethe 80C51 learning curve
1995/6
1999/4
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Just in time processing
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ADPCM
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ADPCM
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ADPCM
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Industrialization of the Technology

• Philips Semiconductors Zürich (1994 Dec)
  We want to set a world record in low power,
  .. by using asynchronous technology.
• Their choice for a vehicle the 80C51
  micro-controller (used in many consumer
  products).
• Result 4 less power, minimal EME.
• Follow-up pager baseband ICs,
• In parallel transfer and upgrade of tools
  design flow

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Pager Baseband Controller ICs

• Myna pager
• FLEX protocol
• 32 alphanumeric messages
• a single AAA battery (1V)
• up to 25 weeks battery life
• Pager baseband controller ICs
• PCA5007, PCA 5010
• http//www.semiconductors.philips.
  com/pip/PCA5007
• http//www.win.tue.nl/pa/wsinap/ async.html

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1998-Sep the PCA 5007
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A new generation of pagersa common platform for
all standards
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EMI a critical design factor (Electro-Magnetic
Interference)

• Antenna signal may be as small as 25?V.
• Clock harmonics of synchronous micro-controllers
  interfere with RF (X00 MHz).
• With asynchronous 80C51 signal decoding by means
  of (standard-specific) software. (This also
  enables upgrading/downloading!)
• Furthermore no shielding is required between
  controller and RF receiver.

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PCA5007 block diagram

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Contactless smartcard IC (ESPRIT project
DESCALE)
Power regulator
80C51 micro-controller DES engine UART RAM, ROM,
EEPROM
13.56 MHz clock power (a few mW) bi-directional
communication (106 kbit/s)
Radio link
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Contactless smartcard IC

• Properties
• a) low average power
• lower peak power
• speed adaptation

• Merits
• Maximum speed for received power (a,c)
• Robust operation against voltage drops (c)
• Smaller buffer capacitor (b,c)

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Conclusion

• First asynchronous VLSI circuits on the market
  (high volume sales).
• Prospects for more async products look good.
• Added value low power, EME performance.
• Added costs test, IC area, being different.
• Asynchronous VLSI technology
• there is room for it in market niches,
• but it may contribute to main-stream VLSI.

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Bibliography

• Computer Architecture a Quantitative Approach
  (3rd Ed.) John L Hennessy David A Patterson
  Morgan Kaufmann Publishers Inc, 1996.
• ARM System Architecture Steve Furber Addison
  Wesley, 1996.
• DSP Processor Fundamentals, Architectures and
  Features Phil Lapsey et al (Berkeley Design
  Technology Inc.), IEEE, 1996.
• www.handshakesolutions.com
• www.arm.com/news/6936.html
• www.research.philips.com/ newscenter/archive/2004/
  handshake.html

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Lab-work and report

• You are allowed to team up with a colleague (Not
  mandatory.)
• Report more than listing of functional Tangram
  programs
• analyze the specifications and requirements
• present design options, alternatives, trade-offs
• motivate your design choices
• explain functional correctness of your Tangram
  programs
• analyze explain area, time, energy of your
  programs.