Title: VGA Text Mode
 1VGA Text Mode
- An introduction to font selection and to 
reprogramming of the Character Generator ram 
  2alphanumeric information
- Most early PC programs werent graphical 
 - Screen was similar to a typewriters output 
 - Used only a limited set of character-images 
 - letters, numerals, and punctuation symbols 
 - Hardware can efficiently render such glyphs 
 - VGA can emulate the MDA/EGA text modes 
 - mode 1 emulates EGA 40x25 text (320x200 pixels) 
 - mode 3 emulates EGA 80x25 text (640x400 pixels) 
 - mode 7 emulates MDA 80x25 text (720x350 pixels)
 
  3Font images in ROM
- VGA has built-in firmware (ROM-BIOS) 
 - Both code and data are provided in ROM 
 - VGAs ROM is normally at 0x000C0000 
 - Can be addressed by CPU in real-mode 
 - VGA ROM includes character glyph tables 
 - 8x8 character-set is used with mode 1 
 - 8x16 character-set is used with mode 3 
 - 8x14 character-set is used with mode 7
 
  4A character-glyph example
- Heres a sample 8x8 character glyph (A)
 
This glyph can be represented as an array of 8 
bytes 0x00, 0x38, 0x6C, 0xC6, 0xFE, 0xC6, 
0x00, 0x00 
 5VGA Timer-Sequencer
- A character table is copied into VRAM 
 - Glyphs organized as an array of bitmaps 
 - Array holds 256 images (32 bytes/image) 
 -  Table-size 256x32  8K bytes ( 0x2000) 
 - The ascii-codes serve as array-indexes 
 - Example A has ascii-code 0x41 (65) 
 - Sequencer hardware accesses these images 
 - Dedicated area of VRAM is used (plane 2) 
 - Planes 0 and 1 are used as a text frame-buffer
 
  6Arrangement of VRAM planes
plane 3
plane 2
plane 1
plane 0
Not used (masked)
Holds the character glyph table(s)
Stores color attribute-bytes for displayed text
Stores ASCII- codes for the currently displayed 
text
CPU can read/write only to planes 0 and 1 (using 
odd/even addressing mode) 
 7multiple fonts supported
- Plane 2 is the Character Generators ram 
 - Enough room for eight separate tables 
 - 8 x 8K  64K 
 - Two tables can be in use simultaneously 
 - Tables must start at prescribed offsets 
 - Table 0 0x0000 Table 4 0x2000 
 - Table 1 0x4000 Table 5 0x6000 
 - Table 2 0x8000 Table 6 0xA000 
 - Table 3 0xC000 Table 7 0xE000 
 -  
 
  8Text color attributes
- In text mode, the picture-elements consist of 
character images, shown in two colors  - Foreground color, and Background color 
 - Character colors individually programmed 
 - A byte-pair in VRAM selects the bit-image (ascii 
code) and color-pair (attribute byte)  - All colors come from a palette of 16 
 - But the color palette is programmable
 
  9Layout for an attribute byte
Foreground Color
Background Color
R
G
B
R
B
G
Bit function is programmable Default is 
EnableIntensity
Bit function is Programmable Default is 
EnableBlinking 
 10VGA Sequencer Registers
- Five registers comprise VGA Sequencer 
 - index 0 Reset register 
 - index 1 Clocking Mode register 
 - index 2 Map Mask register 
 - index 3 Character Map Select register 
 - index 4 Memory Mode register 
 - All accessed via i/o ports 0x3C4-0x3C5 using 
multiplexing scheme (index/data) 
  11Access to character ram
- In text modes, CPU cant access Plane 2 
 - Plane 2 gets accessed by the Sequencer 
 - Sequencer performs a glyph-lookup for each 
ascii code stored by CPU in Plane 0  - Both Sequencer and Graphics Controller must be 
suitably reprogrammed in order for the CPU to a 
read or write to Plane 2  - Six VGA registers are involved in that step 
 
  12Reset (index 0)
 7 6 5 4 
 3 2 1 
 0
Synchronous Reset bit (bit 1) 1  normal 
sequencer operation 0  initiate a synchronous 
reset
A synchronous reset is used in advance of 
reprogramming the Clocking Mode register (or 
the Clock Select field in the VGAs Miscellaneous 
Output register)
Asynchronous Reset bit (bit 0) 1  normal 
sequencer operation 0  initiate an asynchronous 
reset
Halts VRAM refresh cycles and clears VRAM contents 
 13Map Mask (index 2)
 7 6 5 4 
 3 2 1 
 0
Plane 3
Plane 2
Plane 1
Plane 0
Enables or disables CPUs ability to access 
specific memory planes 1  write enable, 0  
write disable 
 14Memory Mode (index 4)
 7 6 5 4 
 3 2 1 
 0
Chain-4 Addressing 1  enabled 0 
 disabled i.e., each plane holds every 
fourth byte
(For EGA only) 1 text 0  graphics
Odd/Even Addressing 1  disabled 
0  enabled Its used for text modes
Extended Memory (gt64K) 1  present, 0  absent 
 15GC Miscellaneous (index 6)
 7 6 5 4 
 3 2 1 
 0
Memory Map
Odd/ Even enable
G/A
Memory Map options 00  0xA0000 (128K) 01  
0xA0000 (64K) 10  0xB0000 (64K) 11  0xB8000 
(32K)
1  use Odd/Even Addressing 0  use Sequential 
Addressing
1  Disable the character generator( graphics 
mode) 0  Enable the character generator (use 
text mode)
Graphics Controller registers are accessed via 
i/o ports 0x3CE/0x3CF 
 16GC Mode (index 5)
 7 6 5 4 
 3 2 1 
 0
256 colors
SHIFT
ODD/ EVEN
Read Mode
Write Mode (0, 1, 2, 3)
Should be 0 for text mode
1  cpu data at odd addresses is mapped to 
odd-numbered planes, cpu data at even addresses 
gets mapped to even-numbered planes 0  cpu 
addressing is sequential NOT This affects only 
the Graphics Controller. The Sequencer needs 
to be programmed separately to match
This affects the VGA Attribute Controllers operat
ion (text color foreground color and 
background color) Should be 1 for text 
 17How to modify character ram 
- Algorithm 
 - Reset the VGA for accessing Plane 2 
 - Then CPU reads or modifies Plane 2 
 - Reset the VGA for accessing Planes 0, 1 
 - Acknowledgement 
 - Author Richard Wilton described this process in 
his classic book Programmers Guide to PC Video 
Systems (2nd Edition)  
  18Details for this prolog
- outw( 0x0100, 0x3C4 ) // do a synch. reset 
 - outw( 0x0402, 0x3C4) // write Plane 2 only 
 - outw( 0x0704, 0x3C4 ) // sequential access 
 - outw( 0x0300, 0x3C4 ) // end the reset 
 - outw( 0x0204, 0x3CE ) // read Plane 2 only 
 - outw( 0x0005, 0x3CE ) // disable odd/even 
 - outw( 0x0006, 0x3CE ) // VRAM at 0xA0000 
 
  19 Details for the epilog
- outw( 0x0100, 0x3C4 ) // do a synch. reset 
 - outw( 0x0302, 0x3C4) // write Planes 0  1 
 - outw( 0x0304, 0x3C4 ) // odd/even access 
 - outw( 0x0300, 0x3C4 ) // end the reset 
 - outw( 0x0004, 0x3CE ) // restore to default 
 - outw( 0x1005, 0x3CE ) // resume odd/even 
 - outw( 0x0E06, 0x3CE )// VRAM at 0xB8000 
 
  20Some Class Demos
- newzero.cpp installs new glyph for 0 
 - romfonts.cpp finds ROM glyph-tables 
 - backward.cpp flips character images! 
 - vm86blue.cpp changes texts attribute
 
  21Algorithm for backward.cpp
- for (int i  0 i lt 8192 i) 
 -   
 -  unsigned char orig, revs  0 
 -  orig  vram i  
 -  for (int j  0 j lt 8 j) 
 -  if ( orig  (1ltltj) ) revs  (1 ltlt (7-j) ) 
 -  vram i   revs 
 -   
 
  22Attribute Controller (0x3C0) Color Plane Enable 
(index 18)
 7 6 5 4 
 3 2 1 
 0
Plane 3
Plane 2
 Enables or disables color-palette 
address-bit from specific planes 1  plane 
enable, 0  place disable
Plane 1
Plane 0
NOTE Writing to Attribute Controllers registers 
requires sending two bytes in succession to same 
port-address (0x3C0) reset internal flip-flop 
first by Inputting from port 0x3DA output 0x20 
to port 0x3C0 as a concluding step. 
 23In-Class Exercises
- Exercise 1 Design a new image for A 
 - Exercise 2 Draw all text upside-down 
 - Exercise 3 Draw yellow-on-green text 
 - Exercise 4 Draw fonts vertically aligned