Differential and Multistage Amplifiers

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Differential and Multistage Amplifiers

• FET Differential Pair
• Small Signal Model
• Biasing

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Differential Amplifier
Differential amplifier consists of two matched
transistors which conduct the same current

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Common Mode Input Voltage
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Exercises 7.1, 7.2
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Exercise 7.3

• V_DD and V_SS1.5 V, k_n(W/L)4mA/V2, V_t0.5V,
  I0.4mA, R_D2.5k Ohm

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Diff. Amp. With Diff. Input

• vG20, vG1vid

VG1
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Large Signal Operation of MOSFET Diff. Amplifier

• Nonlinear response to change in voltage
  differential

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Transfer Characteristic of FETDiff. Pair

• Linear only for small input!
• Difference is limited to V_ov

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Extending Linear Operation Range
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Small Signal Model MOS Diff
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Small Signal Analysis

• Input and output Impedances

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Simplified Model
Cut the differential pair into 2
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Mismatch of g_m
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Offset Voltage to compensate
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Active Loads

• Active load maintains bias current I
• Active load has high impedance

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Active Load

• Active Load in Saturation
• Without any input

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Active Load

• The current generated by differential input will
  only flow to the load

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Active Load

• In practice, leakage from Drain to Source

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Analysis of Small Signal
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Frequency Response
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Frequency Response