Evolution of Intel CPU

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Evolution of Intel CPU
4004 8008 8080 8085 8086 8088 80286 80386
80386 SX, 80386 DX 80486 80486 SX, 80486 DX,
80486 DX2, 80486 DX4 Pentium Pentium Pro
Pentium II, III, 4 and so on
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Speed Test of Intel CPU
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Microcomputer
Input
CPU
Output
Memory
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CPU Task

• ????????????????????????????? Memory ??? I/O
• ?????????????????????????????????????
• ????????? Flow ???????????

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2 3
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2 3
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2 3
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CPU VS. Human

• Complexity of processing
• Speed
• Correctness

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CPU
Central Processing Unit
ALU
Arithmetic Logic Unit
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ALU
Note Comparators store result in Status
Register ( Flag )
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Zero Address Instruction
Get 2 data from stack to add
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Zero Address Instruction
Store result back to stack
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Single Address Instruction
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Single Address Instruction
Load and Store architecture
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Next Step of CPU
After add BX, CX, DX Data bus Internal and
External
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Next Step of CPU
After add BP, SI, DI New type of bus address bus
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CU Control Unit
ROM
ALU
CU
Microprogram Microcode
An other type of CU is Hardwire
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Subsequence of Instruction

• Add AX, BX
• AX to Buffer Register in ALU
• BX to Buffer Register in ALU
• Perform Add operation
• Store result back to AX

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Add Instruction Decoder,Control Unit and
Control Bus
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CPU Component
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CU Subsequence (mov a, 80h)

• Program Counter ???????????? 0 ??????????????????
  CU ???????????????????? Address Bus
• Address Bus ??????????? 0000h ???????????????????
  Address ?????????????? 0000h
• CU ????????? Read ??????????????????????????
  Control Bus
• ????????????????????????????????? Read ???
  ????????????????????????????? 0000h ?????
• CU ??????? Instruction Decoder ???????????? Data
  Bus ??????????
• Instruction Decoder ?????????????? CU
  ??????????????????? Microcode ?????? Sequencer

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CU Subsequence

• Instruction Decoder ?????????????? PC
  ???????????????????????????????
• CU ???????????????? Sequencer ???? ?????????? PC
  ?????????????????? (?????????? 0001h)
• CU ????????? Read ?????
• ????????????????????????????????? Read
  ???????????????????? (80h) ????????? Data Bus
• CU ??????? Accumulator ????????????????
• CU ??????? PC ????????????????????????? ????
  0002h

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8086
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Upgrade CPU

• Prefetch Queue
• Problem found when jump
• Cache ( SRAM )
• L1 Cache ( Unify and Separate )
• Instruction Cache ( Pentium )
• Data Cache
• L2 Cache

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Cache
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Upgrade EU
Pipeline
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Pipeline
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8086 Instruction time
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80286 Instruction time
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Pipeline Hazard
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Solution of Pipeline Hazard

• Optimize code by compiler
• Superscalar technique
• Branch prediction
• Prefetch Queue
• Pipeline

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Branch Prediction

• Prefetch queue
• fetch both instruction
• Pipeline
• Statistic

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