ECT 358

1
ECT 358

• Lecture 4a
• Xilinx Spartan II FPGA

2

• A measure of a mans character is not what he
  gets from his ancestors, but what he leaves his
  descendants.
• A good man leaveth an inheritance to his
  childrens children and the wealth of the sinner
  is laid up for the just.
• Proverbs 1322

3
Xilinx Spartan Architecture

• Array of configurable logic blocks
• Local and global routing resources
• Block Select RAM
• I/O blocks
• Programmable I/O buffers
• SRAM based configuration memory
• Delay Locked Loops

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Spartan II Architecture
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Spartan II features

• 200 MHz I/O switching frequency
• 150,000 gates
• 2.5 V operating voltage
• On-chip block memory
• New architecture
• Multiple I/O standards (16) (reference/voltage/ter
  mination) IEEE
• 4 Delay locked loops
• 49152 block RAM bits

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Configurable Logic Block

• 4 input logic cells
• Carry and control
• D F-Fs
• Additional Inputs

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Input-Output Block

• Individually programmed
• High speed memory
• Bus standards
• 3 registers
• Latch or F-F
• Synchronous Output
• Output Control
• Input Bypass