ICARUS General Trigger Design

1
ICARUS General Trigger Design
Work jointly conducted by Napoli and Padova groups

• Contributions from
• M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo,
  P.Parascandolo, R.Santorelli, P.Trattino
• B.Baboussinov, S.Centro, F.Pietropaolo, S.Ventura

2
Physics considerations

• Events
• Cosmic rays muons
• Atmospheric neutrinos
• Solar neutrinos neutrons ? E 5 MeV
• Neutrinos from Supernova (burst) ? E 20 MeV
• Proton decay
• CNGS neutrinos ? external timing
• Beam muons

3
Supernova burst
(See A.Rubbia presentation Sept. 02)

• Specific time structure
• Ex. 100 SN triggers in T300 in 1 sec
• Global trigger bandwidth storage problem
• 1 event 27648 ch ? 2500 samples ? 2 bytes
• 130 MB ? 13 GB total
• Local trigger SN events are localized and
  limited to 1 crate per view
• 5 events per crate in COLL IND2 views 40
  MB/crate
• 13 events per crate in IND1 view 60 MB/crate
• ? Each crate can be read-out as a separate event

4
Segmentation and Selectivity
Muon
Cosmic-ray shower
Low energy electrons
5
T600 pixel definition
T600 Half Module 1 chamber viewed from cathode
Rack 11
Rack 13
Rack 20
Rack 1
864 mm
32 x 9 Induction II wires
32 x 9 Collection wires
1 pixel area 0.6 m2
Total Number of Pixels 80
6
MC simulation low energy events
ICAFLUKA, special thanks to G. Battistoni)
7
MC simulation high energy events
ICAFLUKA, special thanks to G. Battistoni)
8
Pixel definition
9
Preliminary considerations

• Trigger rate is dominated by physics background
• Neutron capture rates expected in T600
  (ICARUS/TM-2002/13)
• 2?10-4 s-1 from natural radioactivity of the rock
• 0.03?0.1 s-1 from Al container
• Segmented trigger potentially solves bandwidth
  and storage problems
• Event pre-classification ? data streams
• extraction of solar neutrino data from low energy
  stream
• Test bench for T1200 low energy trigger

10
Trigger Input

• PMTs
• DAEDALUS
• AWS (Analog wire sum)
• External (beam profile chambers, cern-spill, )

11
Basic design requirements

• Redundancy important to measure efficiency
• Global trigger
• Generated by PMTs or external
• drift deadtime GLOBAL_DRIFT (1ms)
• Read-out deadtime GLOBAL_BUSY (1s) vetoes new
  global triggers
• Local triggers vetoed during GLOBAL_DRIFT
• Local trigger
• Generated by AWS PMT
• LOCAL_DRIFT (1ms) vetoes new local triggers

12
Trigger system architecture

• LTCU
• discriminates the 18 inputs,
• has one independent threshold
• for each input,
• gives two trigger proposal as output
• TCU
• performs coincidences between LTCUs proposals,
  
• processes the fired pixels to study and label
  the event topology,
• requests global or local trigger
• Trigger Supervisor
• monitoring of the trigger and the DAQ system,
• statistical functions.

13
Trigger System Architecture
14
LTCU v1.0 test on Geneva prototype and LTCU v2.0
15
The Local Trigger Control Unit prototype targets

• discriminate the inputs, coming from the v791
  boards
• give as output two separate trigger proposals to
  the next level, one for Induction II and one for
  Collection
• remote control of all the boards
  functionalities
• discriminators check-control
• trigger rate measurements for each input.

16
The LTCU prototype v1.0
Power supply
FPGA
Input stage
DAC
10 MHz oscillator
RS232 interface
18 inputs
Trigger outputs
17
The LTCU functionalities v1.8i

• Mask the input channels
• Read the mask status
• Set the thresholds
• Monitor the trigger rate for each input
• Discriminator test mode
• Select one discriminator output put on front
  panel.

All the board functionalities are remotely
controlled via RS232 interface.
18
Trigger rate test chain
V789
V816

• LTCU inputs 4 S signals from collection plane
• Trigger generated from only one S input (no
  FastOR)
• LTCU trigger output distributed to V816 module.

IN
trigger
IN
IN
IN
IN
IN
IN
IN
IN
V791
Ind
Coll
LTCU
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
LTCU Trigger OUT
S
S
S
S
IN
PC (RS232)
Analog S OUT
19
Trigger Rate Plateau (I)
Plateau zones
20
Trigger Rate Plateau (II)
Plateau zones
21
Trigger efficiency test chain
V789
V816

• LTCU inputs 4 S signals from collection plane
• One LTCU IN and Trigger OUT digitalized by a
  modified V791
• PMT trigger distributed to V816 module.

IN
trigger
PMT
IN
IN
IN
IN
IN
IN
IN
IN
V791
Modified V791
Ind
Coll
LTCU
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
S
S
S
S
IN
IN
IN
PC (RS232)
Analog S OUT
22
Test Results (I)
23
Test Results (II)
Problems Solutions
High frequency noise on input signal Band-pass filter (f-3dBH 2 MHz , f-3dBL 1 kHz)
Offset for negative input isnt a stable solution Inverter amplifier (G1) in the input stage
More than 20mV white noise New pcb (with 8 layers) and EM/RF screening
Not stable DAC threshold Stable VREF circuit
24
LTCU prototype v2.0
EM/RF Screening for input stage
25
PWR and GND distribution for LTCU v2.0
Four GND and two PWR planes
VCC, DGND (V791 digital stage)
5A1, AGND1 (V791 mux stage)
5A, AGND (V791 preamp. stage)
26
Conclusions

• LTCU v2.0 is being produced (5 boards)
• Ready to be tested on detector prototypes
• Analysis of test data in progress
• Article in preparation.