Distributed Computing: A Glimmer of a Theory

1
Distributed Computing A Glimmer of
a Theory

• Eli Gafni
• UCLA
• Porquerolles, 5/6/03

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Outline

• Tasks
• Model of Computations as Tasks
• Solving a task in a Model
• SWMR Task
• Characterization of Wait-Free Solvability
• Resiliency and Strong Primitives (BG Sim)
• Uniform Tasks and Protocols
• Methodology
• Characterization
• Open Problems

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Distinguish Models by the Set of Tasks They Solve

• Task
• An input output relation from input i-tuples to
  sets of output i-tuples, i1,,n
• (p1) (p1)
• (p2) (p2)
• (p1,p2) (p1,p1), (p2,p2)
  

Ti Vi
2Vi
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Models of Computation

• Tasks viewed as Rewrite system
• (p1) (p1)
• (p2) (p2)
• (p1,p2) ((p1),(p1,p2)),((p1,p2),(p1,p2)),
  ((p1,p2),(p2))
• 2 processors SWMR one-shot

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Can one-shot SWMR solve relaxed concensus?

• (p1) (p1)
• (p2) (p2)
• (p1,p2) (p1,p1),(p2,p1),(p2,p2)
• Solution
• p1 (p1) (p1), (p1,p2) (p2)
• p2 (p2) (p2), (p1,p2) (p1)

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Map of SWMR to relaxed cons

• Solution
• (p1) (p1)
• (p2) (p2)
• (p1,p2) ((p1),(p1,p2)),((p1,p2),(p1,p2)),
  ((p1,p2),(p2))

p1
p2
p2
p1
p1
p1
p2
p2
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Can One-Shot SWMR solve cons?

• No matter what will (p1,p2) map to there will
• be a p1-p2 edge
• The one-shot protocol complex is CONNECTED, the
  cons output complex is disconnected

p1(p1)
p2(p1,p2)
p1(p1,p2)
p2(p2)
p1
p2
p2(p2)
p1(p2)
p2(p1)
p1(p1)
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The Multi-Shot Protocol Complex
Multi-shot can solve any task whose output is
connected
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Tiling View of Solving a Task

• The output dictates domino tiles, any number of
  each kind
• Two distinguished domino sides
• If able to tile any k-shot SWMR solution iff
  connectivity between the distinguished domino
  sides.

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What is the Task spec of one-shot SWMR?

• For each pi given a set Si subset of
  Pp0,,pn-1 could this combination of sets
  arise as a result of writing and scanning the
  memory?
• pi in Si
• pi in Sj or pj in Si
• For all Q subset of P exists pj in Q, Q subset Sj
  (the last to write among a set of processors will
  read all of them.

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SWMR Spec

• A nonempty set Sn, each member return P.
• Project Sn off all Si and recurse.
• Immediate Snapshots
• pi in Si
• pi in Sj or pj in Si
• pi in Sj then Si subseteq Sj
• SWMR iff fat immediate snapshots

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N-shot SWMR solves ISn

• Stages 0,1,,n-1
• At each stage input of pipi.
• If at stage k Sin-k then pi returns Si.

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The Protocol Complex of one-shot IS3
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The Protocol Complex of two-shot IS3
To solve a task T3 you need to tile some ISk
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If able to tile any subdivided simplex, able to
tile ISk
Isk creates fine chromatic greed. Approximate
black-red edges with black-red path.
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2 set-cons is not solvable by 3 processors

• Each processor outputs a participating processor
  id.
• The union the ids in a tuple leq 2.
• Sperner Lemma Every tiling of a triangle must
  include a tile of the 3 distinct colors.

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2 test-and-set is not solvable by 3 processors

• Each processor outputs 0 or 1.
• Each output tuple contains one or two 0s.
• Reduction to 2 set-consensus

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3 processors uniform renaming impossible with 4
slots

• Each processor output a value in 1,2,3,4
• All values in a tuple are distinct
• Participating set size 1 returns 1, size 2 does
  not return 4.
• Reduction to 2 tst if output 1 or 2, return 0,
  otherwise, return 1.

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Can 3 processors 2-resilient solve cons?
p1
p2
p3
Each instruction goes thru agreement
protocol w,r, write what you read, wait until
other processor write what read or did not w at
all. If both see each other lower id win,
otherwise the one who did not see the other.
w,r w,r w,r
2 Simulators wait free Agreement blocks at most
1 code, 2 proceed. valid bwhavior of 1
resilient.
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When is a task solvable by 3 processors 2
resilient?

• Output connected
• The link of a vertex connected

The output of blue-red going alone
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When is a task solvable by 3 processors with
test-and-set?

• Output connected
• The link of a vertex not necessarily connected

The output of red-black alone when red wins.
The output of red going alone
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What about Message-Passing

• MPSWMR-SM provided majority resilient. Below
  majority MP disconnects.
• MP taskeach processor outputs a set of at least
  a majority.
• MP model iterate the task!
• Communication closed layers

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Iterated MPIterated SM

• Key observation Since each hears from majority,
  then majority hears from one.
• At the next round majority will have a majority
  in common
• When a processor hears from majority that has
  heard about it, it returns the set of processors
  it heard about and finished simulating its part
  of SWMR stage 1. Etc.

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Round by Round Failure Detector

• At each round a processor pi waits either to hear
  from processor pj, or on a failure detector
  module that announces pj to be faulty.
• Can investigate what are the minimal requirements
  on a FD to be able to solve a task Tn (does there
  exist a minimum?).

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Synchrony vs Asynchrony

• When thinking iterated the difference is that in
  Synch once pi does not hear from pj, pj
  completely crashed in the next round - in Asynch
  it was slow and now comes back
• I.e. Static vs Mobile failures
• Asynch Synch with Mobile Omission failures

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Corollary

• Synch with k (static) omission failures cannot be
  distinguished from 1-resilient asynch prior to
  round k1 (expend 1 failure at a Synch round).
• Since 1-resilient asynch cannot solve cons, it
  takes at least k1 round of synch
• Can be extended to crash failure thru reduction.

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Uniform Protocols

• The solution to the immediate snapshot problem
  takes n as a parameter.
• Want a solution that does not depend on n!
• What is then the problem solved and how do you
  formally say no n in the solution?

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Example Task Snapshot
The following is not a snapshot of 3 processors
0,1,2
0 write 0, 0 read 0, 0 read 1, 1 write 1, 1 read
0-1-2, 2 write 2, 0 read 2, 2 read 0-1-2
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Uniform Solution to the Snapshot Task
Write i to Ci Scan C0,C1,..,Cn-1 successively
until return same sets in two successive
scans. Complexity O(n2) Reduce Complexity-
With each Ci there is a MWMR associated bit bi
initially 0. When writing Ci set b0,,bi To 1.
Read Cj, j0, until encounter the first bk0.
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Non-Uniform Snapshot Protocol HR93

• Write i
• Oi Scan C0,.Cn-1
• If Oilt(n/2)1 return i, else
• Oi Scan C0,.Cn-1
• Return Oi
• Continue inductively (0,(n/2)),(n/2,n-1)

Large did not finish first scan before small scan
(otherwise small Scan is strictly after large
scan). Consequently, second large scan Is
strictly after small write. Complexity O(n log n)
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Uniformization of the O(nlogn) Snapshot protocol

• Suppose I have 2n processor 1,2n but expect only
  1,n to participate.
• Want to operate the 1,n algorithm and still
  recover in case some from n1,n arrive.

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Uniformization of the O(nlogn) Snapshot protocol
(cont)

• Idea
• Processor 1,n executes the 1,n protocol.
• When iltn1 terminates, it posts Si, and checks
  whether any of the n1,2n registered
• No processor i departs
• Yes Joins the protocol 1,2n with Si as input
• Processor n1,2n takes its input to be its id
  union the largest Si it observe posted in 1,n.

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Uniformization of the Immediate Snapshot (IS)
Protocol

• Processor 1,n executes the 1,n protocol.
• All register upon arrival.
• When iltn1 terminates, it posts Si, and checks
  whether any of the n1,2n registered
• No processor i departs
• Yes Joins the protocol 1,2n with all the largest
  Sj smaller than Si posted
• Processor in n1,2n takes as input all the
  Sjs it observe posted.
• Processor first drops tokens on behalf of the
  smallest Sj in its input.

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Uniformization of the Immediate Snapshot (IS)
Protocol (Contd)

• After that it drops tokens on its behalf
• Processor i may RETURN at line k while processor
  j may drop token i further down later
• Processor j at line k with token i signals
  (raises flag) it intend to drop token I to k-1
• It then reads level k again
• If number of distinct token in k ltk it drops
  token i to k-1
• Else, it stops dropping token i at line k
• Processor i when dropping token i if processor j
  at line k signaled it is dropping i, drops i to
  k-1 no matter if k distinct tokens at level k.
• Complexity O(k3) but know better O(k2)

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Definition of a Uniform Task and a Uniform
Protocol

• Sequence of tasks T0, T1,,Tk, Tk1,, where Tk
  is over processors 0,,k and Tk1 extends Tk
  (Tk1 over participating set without k1 is Tk,
  and every k solution extends to k1)
• Solution to Tk1 extends solution to Tk

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Methodology

• Given a Uniform task T, solve Backward-Compatible
  Tn (BC-Tn)
• Processors in BC-Tn each wake up with a partial
  solution to Tn (all factions of the same
  solution)
• Solve Tn such that if all processors wake up with
  solution to processor i, then processor i has to
  halt with that output
• Solve ,,BC-T2i,BC-T2i1,
• Conjecture Since the simplex convergence is BC
  solvable any BC solvable task has same complexity
  as the original task.

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Application O(k2) Renaming

• Tk k processors rename into range 1,2k-1.
• Take IS, if highest id in Si output 2Si -1
• All processors j of same cardinality Sj
  continue inductively on slots 2Si-1, 2Si-2,
• If Si is large then j spent little complexity
  in the IS
• If Si is small then few processors participate
  later in the inductive IS together with it.
• Complexity O(n2), uniformize IS

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Solvable Uniform Task - No Uniform Solution
SDS1(S2)
c
d
a
b
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Solvable Uniform Task - No Uniform Solution
(conted)
SDS2(S2)
b
c
d
b
c
c
a
b
a
d
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Solvable Uniform Task - No Uniform Solution
(conted)

• For Tn n-even processors p0,p1,pn-1,pn output
  SDSn(s3), only that the face p0,p1 maps snakewise
  to a,b,c,d,c,
• Tn is obviously solvable by taking enough steps
  to produce SDSn(s3).

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Solvable Uniform Task - No Uniform Solution
(conted)

• For the Uniform version of Tn (downward
  compatible) pi chooses a vertex in SDSn(s3) but
  maps it to a vertex in SDSi(s3), by considering
  only the LAST i iterations.
• Not solvable uniformly, since pn-1 and pn do not
  know which actual vertices p0 and p1meant by
  outputting, say, c and d, respectively.

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Characterization of Uniform Solvability

• HS A task on n1 processor is solvable iff there
  exist a map from the output to an n-dim
  subdivided simplex.
• Uniform Solvability The map to the n1-dim
  subdivided simplex extends the map to the n-dim
  subdivided simplex

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Idea of Proof Of the Characterization

• IIS model that gives rise to a protocol complex
  which is a subdivided simplx
• Show equivalence of IIS to standard asynchronous
  model by showing UNIFORM emulations between the
  standard and the IIS model.

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Connection to Adaptive Algorithms

• Adaptive Algorithms Distributed Algorithms whose
  Step Complexity is a Function of the Number of
  Participating Processors Rather than n.
• Adaptive Algorithms Uniform Algorithms for
  Symmetric problems (e.g. Snapshots)

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Open Problem(S)

• Extend to infinite arrival guaranteeing
• Non-Blocking
• Waitfreeness
• How do you formulate such a problem as a task?