2.5D and 3D ASIC design technologies-2.5D SoC SiP-HBM 3D-stacked-DRAM technology

1
2.5D and 3D ASIC design technologies

• As an early advocate of 2.5D and 3D ASIC design
  technologies and by leveraging its experience
  from the industrys first multiple successful
  2.5D SoC SiP demonstration, OpenFive plays a key
  role in enabling industry applications that
  leverage the HBM 3D-stacked DRAM technology.
• HBM3/2E/2 IP Subsystem The HBM3/2E/2 IP is
  suitable for applications involving graphics,
  high-performance computing, high-end networking,
  and communications that require very high
  bandwidth, lower latency and more density.
• Integrated HBM controller and HBM PHY subsystem
  solution supporting HBM3, HBM2E and HBM2 JEDEC
  spec for a wide range of technology and foundry
  nodes. 

https//openfive.com/hbm3-2e-2-ip-subsystem/
2
HBM3/2E/2 IP Subsystem

• HBM3/2E/2 IP Subsystem The HBM3/2E/2 IP is
  suitable for applications involving graphics,
  high-performance computing, high-end networking,
  and communications that require very high
  bandwidth, lower latency and more density.

https//openfive.com/hbm3-2e-2-ip-subsystem/
3
HBM3/2E/2 ASIC SiP

• As an early advocate of 2.5D and 3D ASIC design
  technologies and by leveraging its experience
  from the industrys first multiple successful
  2.5D SoC SiP demonstration, OpenFive plays a key
  role in enabling industry applications that
  leverage the HBM 3D-stacked DRAM technology.

https//openfive.com/hbm3-2e-2-ip-subsystem/
4
Protocol controller

• JEDEC (JESD235B) HBM3/2E/2 DRAM specification
  compliant
• Pseudo-channel mode support
• Multi stack HBM3/2E/2 memory support
• Power down self-refresh modes
• Low latency controller features
• Per channel data rate Up to 3.2Gbps/pin
• Configurable independent channels
• Memory access optimizations for bandwidth
  efficiency
• Configurable error injection mechanisms for
  testability
• DFI-like controller/PHY interface
• Supports 11 21 PHY/controller frequency
  ratios
• Memory die diagnostic features
• JTAG connectivity for IEEE-1500 access, lane
  repair, training and loopback test modes
• Multiple in-built test diagnostic features

https//openfive.com/hbm3-2e-2-ip-subsystem/
5

• Please do visit my website for
• in-depth information.
• Website
• https//openfive.com/hbm3-2e-2-ip-subsystem/