Reliability issues in deep deep submicron technologies: timedependent variability and its impact on

1
Reliability issues in deep deep sub-micron
technologiestime-dependent variability and its
impact on embedded system design

• Antonis Papanikolaou
• representing the
• Technology-Aware Design team,
• IMEC vzw
• Design for Reliability session
• MEDEA Design Automation Conf.
• May 2007
• Grenoble, FR

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Embedded systems are becoming a large and
diverging class of consumer products

• Novel embedded system applications impose
  stringent requirements on
• real-time performance for more complex
  applications
• AND low-energy operation
• AND low cost
• AND high yield/reliability

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New system design concern Parametric yield as
a system design priority
1KByte (256 words x 32bit) SRAM _at_65nm
2
All blocks are functionally OK
1.8
1.6
1.4
?
Memory energy (normalized)
1.2
Parametric yield Application/System yield
1
0.8
0.6
0.4
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Memory access time (normalized)
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Reliability issues with scaling from abrupt
failure to progressive degradation

• Gradual failure instead of abrupt failure ?
  performance degradation over time
• Time-dependent degradation of device performance
  time-dependent variability

Past abrupt failures
4
Failure criteria 20?Value
3
2
Normalized R
1
Future gradual failures
T 275 C J 20 mA/mm2
EM progressing
Stress Time (HMS)
5
The parametric-aging problem as a system
time-dependent yield problem
2
1.8
1.6
1.4
?
Normalized system energy
1.2
1
0.8
0.6
0.4
0.4
0.4
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Normalized System Performance
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Outline

• Intrinsic variability
• Progressive ageing and reliability
• Impact of time-dependent variability on runtime
  parametric variations
• Impact on system design and yield
• A paradigm shift is needed

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Outline

• Intrinsic variability
• Progressive ageing and reliability
• Impact of time-dependent variability on runtime
  parametric variations
• Impact on system design and yield
• A paradigm shift is needed

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Performance and energy unpredictability - The Past
1KByte (256 words x 32bit) SRAM _at_180nm
Spread
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Translating process variability into system
performance -energy uncertainty the parametric
yield problem
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Outline

• Intrinsic variability
• Progressive ageing and reliability
• Impact of time-dependent variability on runtime
  parametric variations
• Impact on system design and yield
• A paradigm shift is needed

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Technology scaling changes the impact of
reliability breakdown mechanisms on device
performance/energy

• Gate oxide breakdown, NBTI, electro-migration,
  dielectric breakdown become more progressive and
  start much faster

Hard-break
Progressive wear-out
4
Failure criteria 20?R
3
2
Normalized R
1
Random impact on Energy/Delay
2
1
3
4
T 275 C J 20 mA/mm2
5
EM progressing
Stress Time (HMS)
ElectroMigration (EM) signature in narrow lines
(lt120 nm line width)
Wear-out and breakdown model for normal (SiON)
and high-k (HfO2) gate oxides
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Reliability problems occur faster with every new
technology node

• Increasing electrical thermal stresses
• New materials like low-k BEOL dielectric high-k
  metal gate stacks
• The increasing dominance of structural
  uncertainties make the moment of break less
  predictable

45 nm
32 nm
65 nm
T100C _at_0.15MV/cm
Reliability Criteria (10years)
Guaranteed product life-time diminishes
significantly!
Reliability targets and projected MTTF in
advanced Cu-low-K materials
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Outline

• Intrinsic variability
• Progressive ageing and reliability
• Impact of time-dependent variability on runtime
  parametric variations
• Impact on system design and yield
• A paradigm shift is needed

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Energy/Delay variations under time dependent
variability
Sense Amp E/D under combined impact of SBD and Vt
variations
1.60
1.40
1.20
24
1.00
energy relative
0.80
23
Process variability only
0.60
0.40
0.20
0.00
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
delay relative
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Energy/delay variations under time dependent
variability
Sense Amp E/D under combined impact of SBD and Vt
variations
1.60
Variability SBD_at_t
1.40
49
1.20
24
1.00
energy relative
0.80
23
Process variability only
0.60
64
0.40
0.20
0.00
0.00
0.20
0.40
0.60
0.80
1.00
1.20
1.40
delay relative
Even the occurrence of a single Soft Breakdown
can significantly increase the energy and delay
unpredictability
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Component-level uncertainty ranges grow and move
as time progresses due to time-dependent
variability
Energy consumption
Global magnitude of uncertainty for 3sigma
yield coverage considering time-dependent
variability
Magnitude of shift in the energy and delay axes
will depend on the application dependent usage
patterns of the devices!
3sigma
2sigma
1sigma
t2
t1
t0
Local magnitude of uncertainty for 3sigma yield
coverage considering only static variability
nominal design point
Performance
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Outline

• Intrinsic variability
• Progressive ageing and reliability
• Impact of time-dependent variability on runtime
  parametric variations
• Impact on system design and yield
• A paradigm shift is needed

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Circuit-level statistical optimizations trade-off
performance for power for known variability bounds
50
130nm technology node Delay 3sigma/mean
25 Only static variations
4.3
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System level design margins also trade-off energy
consumption for timing yield/performance
1.6
65nm
1.4
1.2
100
1
manufactured systems meeting clock frequency
Average Energy for memory organization (Relative)
0.8
0.6
0.4
0.2
0
Ref.
Redesigned Architecture
Ref.
Redesigned Architecture
Ref.
Redesigned Architecture
Architecture
Architecture
Architecture
Image Processing
Wireless Receiver
Audio Decoder
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Design-time solutions rely on accumulation of
margins -gt not a scalable solution
Design slack is obtained via statistical analysis
and still big enough to capture rare tail
probabilities to have guaranteed parametric yield
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The energy/yield trade-off becomes a runtime
problem
2
1.8
1.6
1.4
?
Normalized system enenrgy
1.2
1
0.8
0.6
0.4
0.4
0.4
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Normalised System Performance
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Outline

• Intrinsic variability
• Progressive ageing and reliability
• Impact of time-dependent variability on runtime
  parametric variations
• Impact on system design and yield
• A paradigm shift is needed

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Time-dependent variability and its impact on
parametric yield is killing high-level system
design
CICC 2007 invited paper
However after some time Only part of the systems
(e.g. 60) meets the clock freq. spec at 500
MHz Energy becomes random and typically higher
(e.g. 200 - 400 mW for the system above)
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Alternative run-time calibrated systems
CODESISSS 2007
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Run-time component calibration fine-grain
knobs to mitigate time-dependent variability
impact
1.6
Energy per cylcle AU
1.4
X
1.2
1
Spec on power
X
0.8
A particular circuit instance happens to have
this operation point
Knob
0.6
Knob Selects high-speed/high-energy
configuration to regain the delay spec
0.4
0.2
Circuit Delay A.U.
0
0
0.5
1
1.5
2
2.5
Spec on Circuit delay
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System level results design-time vs. run-time
calibration
Useful nominal energy
Overhead using statistical analysis for margins
2.0
65nm
Overhead using run-time calibration
1.8
1.6
1.4
1.2
Relative energy for memory organization
1.0
0.8
0.6
0.4
0.2
0
Audio decoder
Image processing
Wireless receiver
Video encoder
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Conclusions

• Post-production performance and power of
  components and systems will become dynamic and
  unpredictable
• Design-time allocated margins will not be able to
  tackle this unpredictability
• Adequate analysis and run-time compensation/adjust
  ment techniques are required to deal with it
  efficiently

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Soft gate oxide breakdown (SBD) introduces
time-dependent variations in Deep DSM era
Oxide thickness lt2nm
Supply voltage lt1V Soft Oxide Breakdown (SBD) or
wear-outs
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Oxide breakdowns
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Parametric Uncertainties
Degradation TDDB, HCD, NBTI, EM, SIV, low-k DB