1. TMS320C6X DSP Programming with Simulink TI C6000 DSP Target

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1. TMS320C6X DSP Programming with Simulink TI
C6000 DSP Target

• i) TI C6000 DSP target enables simulink blocks
  to model or program signal
• processing algorithm for TMS320C6X DSP
• ii) TI C6000 DSP target generates (build) ANSI C
  code of simulink model
• using Real Time Workshop (RTW)
• The Generated C code are then downloaded to Code
  Composer Studio
• Which download the compiled and linked asm
  program to the DSP board.
• v) And runs the executable on the selected
  hardware
• Configuration Information
• gtgtc6000lib displays TI C6000 DSP
  libraries
• required by RTW to target TI boards
• gtgtccsboardinfo Board and Processor setup in
  CCS IDE
• gtgt help tic6000 functions list
• Components of TI C6000 Targets
• TI Code composer Studio (CCS) IDE link
• C62x DSPLIB blocks
• Targeting DSP/BIOS real time operating system
  in CCS
• RTDX link with CCS real time data exchange b/w
  host and target

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2. TI C6000 and Code Composer IDE

• Generate code for C6000 Evaluation modules
  (EVM), DSP starter KIT
• (DSK) and Simulators
• Matching Simulator and processor setup is
  required for code generation
• C6701EVM C6701sim
• RTW invokes the function make _rtw to start the
  Real Time Workshop
• build procedure
• make_rtw invokes the Target Language Compiler
  to generate the C code
• from model.rtw file.
• Real time Workshop Options for C6000 Hardware
• RTW pane setup for C6XXX categoryTarget
  configuration, ti_C6000.tlc
• Template makefile ti_c6000.tmf, Make
  command make_rtw
• TLC debugging, no options are selected
• TI C6000 target selection the type C6701 EVM
• TI C6000 code generation select Incorporate
  DSP/BIOS and Inline DSP
• TI C6000 compiler select optimization
  function(-o2) and Byte order
• Little_endian
• TI C6000 linker select Retain.obj files, Linker
  cmd Internal_memory _map
• TI C6000 runtime, Build action
  Build_and_execute

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3. C62 and C64 DSP Libraries Fixed Point
Arithmetic Blocks

• What are fixed Blocks?
• Using these blocks simulink can process, analyze
  and optimize discrete
• time dynamic system that use fixed point
  arithmetic
• Why it is required?
• Generates integer C code representation of
  Simulink design
• Allows to connect and generate code for external
  embedded devices
• TI dsps, Motorolla microprocessor, FPGA in
  conjunction with RTW
• Allow Q-format conversion used for 62X DSP
  library block

Hardware Design Number representation and Fxd vs.
Floating Block output
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Scaling Generalized Fixed Point for Fixed Point
DSP
A) Radix Point scaling by power of 2 B)
General Slope Bias Encoding - not in scope of
this workshop
V is real world value and
V is approx
Q is the integer
which encodes V
S slope F2E , 2E
is radix point, E is power
of
two exponent, F is fractional slope

B Bias Radix Point Scaling Powers-of-two
scaling involves moving only radix point, B 0,
F 1.
Example sfix(5) is a 5bit signed fixed point
integer which is dec.15 sfix(5)_En2
is 5bit signed fixed point integer scaled by
radix 2 or binary Point is moved
two place to left of Left Most Significant Bit
LSB What are the max and min value
of sfix(5) before and after radix
scaling? Solution
1
1
1
1
0
Reserved For sign


Default Binary Point
New scaled Radix point
5
Two bit Integer m
Two bit Fraction n
1 signed bit
1
1
1
1
0

Maximum positive 2 radix Scaled value
sfix(5)_En2 Minimum unscaled value
Twos complement Minimum radix 2
Scaled values sfix(5)_En2 C) Quantization
Q-format In Q-format sfix(5)_En2 Q2.2 as Qm.n
Total of bitsmn1

0
0
0
0
1
0
0
0
0
1

Quantization of real world value is
the weighted sum of bits
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• D) Fixed point DSP
• sfix(16) range is limited between 215- 1
  32767 to 215 32768
• To accommodate larger numbers the sfix(16) is
  normalized between 1
• and 1 using Q-format
• sfix(16)_En15 Q0.15 or simply Q.15
• Q m.n where 0(m) 15(n)
  one sign bit 16 bits
• sfix(32)_En30 Q1.30
• Q m.n , 1(m) 30(n) one
  sign bit 32 bits

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Multiplying and storing Q.15 number
Requires 32 bit storage Capacity SHL to
remove Extended sign bit
Two sign bits Right most bit is sign extended
Value at bit 2-14
1 1 0 0 1 0 0 1 1 0 1 1 1 0 1 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2-15
To store 32 bit data in 16 bit space, one bit
pattern is loaded at location2-15 for rounding
up the 15 LSB bits to truncated by right shift of
15 bits