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ILC Detector

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ILC detector requirements exceed the state of the art, and the ILC environment ... R.Partridge. EXECUTIVE COMMITTEE. H.Aihara, J.Brau, M.Breidenbach, J.Jaros, ... – PowerPoint PPT presentation

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Title: ILC Detector


1
ILC Detector
ILC Detector
Silicon Detector for ILC

SLAC DOE Program Review June 7, 2006
John Jaros
2
Why ILC Detector RD?Why now?
  • ILC detector requirements exceed the state of the
    art, and the ILC environment necessitates major
    advances in detector technology. Advances take
    time.
  • GDE Timeline has ILC machine TDR by 2009.
    Detectors are way behind. Need to catch up.
  • US dangerously lags Europe in ILC detector RD
    and physics studies, risking a 2nd class role in
    ILC experiments. Time to fix.
  • EPP2010 Action Item 2 Achieving Readiness for
    the ILC The United States should launch a
    major program of RD, design, industrialization,
    and financing studies of the ILC accelerator and
    detectors.
  • They mean Now.

3
ILC Detector Requirements for Calorimetry
Goal is 30/ vE. State of the art was 60/vE at
LEP
Higgs MassMeasurement
Mbb (GeV)
Mbb (GeV)
  • Good Resolution Lowers Errors/
  • Boosts Effective Luminosity
  • Extends Physics Reach (e.g. ?HHH)

Mbb (GeV)
Mbb (GeV)
4
VXD Must Handle ILC Pair BackgroundPerforman
ce Goal ?? 5 ? 10/psin3/2? ?mgtgtState of the
art.
  • Environmental Challenge Reading out a pixel VXD
    fast enough to avoid being swamped by pairs
    background from 3000 bunch crossings. No proof of
    principle exists.

Precision Measurement of Higgs BranchingFractions

  • Fundamental test of Higgs Couplings to Fermion
    Mass Gauge Bosons
  • Distinguishes SM, MSSM, 2HD,


5
  • International Linear Collider Timeline

pushes detector development hard
2005 2006 2007 2008
2009 2010
Global Design Effort
Project
Baseline configuration

Reference Design
Detector Outline Documents/ Costs Needed

Technical Design
Detector Designs/Proofs of Principle/Costs Needed
ILC RD Program
Expression of Interest to Host
International Mgmt
6
US Lags in Detector RD
  • Report from the WWS RD (Damerell) Panel

Resources manpower by region
Resources equipment funds by region
Caveat From a survey of existing projects only!
7
SLACs Role in ILC Detector Development
  • Coordinates the SiD Design Study with
    Fermilab, BNL, Argonne, many US Universities,
    and international partners from KEK, Tokyo,
    Annecy, and Oxford
  • Designs and studies the Machine- Detector
    interface and IP Instrumentation
  • Provides Computing-Simulation- Analysis
    infrastructure for the US ILC Detector Effort
  • Pursues detector RD, especially Si/W
    Calorimetry, Readout electronics, and Si
    Tracking
  • Optimizes and Benchmarks SiD performance

.
8
Silicon Detector Design Study
Design an ILC detector, aggressive in
performance, constrained in costIdentify and
develop needed detector RDEngage an
international community of physicists interested
in the ILC

SLAC Participants

.
Initiated at Victoria ALCPG 04
International Participants
9
SiD Design Rationale

  • Jet energy resolution goal is 30/?E. Choose a
    dense, highly segmented, SiW Ecal
    and Hcal.
  • High magnetic field limits radius and cost of
    calorimeters and solenoid and maintains BR2.
    B 5
    Tesla
  • Si strip tracker for excellent momentum
    resolution and robust performance
    ?pt/pt2 5 x 10-5 GeV-1
  • VX Tracker at minimum possible radius with max ?
    ??
    5 ? 10/psin3/2? ?m
  • Instrumented flux return for muon identification

10
SiD Starting Point
  • 5 layer pixel VXT
  • 5 layer Si tracker with endcaps
  • Si/W Ecal and Hcal inside the coil
  • 5T Solenoid
  • Instrumented flux return for muon detection
  • Compact 12m x 12m x 12 m

SiD is moving beyond the starting point, with
subsystem designs, full G4 subsystem
descriptions, pattern recognition and PFA code
development, and benchmarking studies.
11
Silicon Detector Outline DocumentCaptures
Current SiD Status
See http//www-sid.slac.stanford.edu/
12
SiD DOD Authors from Asia, Europe, US
13
ILC Machine-Detector Interface Group
  • Expert Group at SLAC/BNL/Oxford crosses
    machine/detector boundary
  • SiD
    ILC
  • Takashi Maruyama Ray
    Arnold
  • Ken Moffeit
    Lew Keller
  • Mike Woods
    Tom Markiewicz
  • Phil Burrows (Oxford)
    Andrei Seryi Brett Parker (BNL) others
  • Principal Accomplishments
  • Evaluate Detector backgrounds for new ILC
    parameters
  • Design IRs for 2, 14, 20 mr crossing angles
  • Design/test beam energy spectrometers (with U
    Oregon and Notre Dame)
  • Investigate EMI (electro-magnetic interference)
    and beam rf effects
  • Design beamlines to accommodate polarimetry,
    energy spectrometers



SiD IR Hall Layout
Crossing Angle Designs
Final SC Quads (BNL)
14
ILC-ESA Beam Tests April 24 May 8, 2006
40 participants from 15 institutions in the UK,
U.S., Germany and Japan Birmingham, Cambridge,
Daresbury, DESY, Fermilab, KEK, Lancaster, LLNL,
Notre Dame, Oxford, Royal Holloway, SLAC, UC
Berkeley, UC London, U. of Oregon
  • Energy spectrometer prototypes
  • T-474 BPM spectrometer M. Hildreth (Notre Dame),
    S. Boogert (Royal Holloway and KEK) are co-PIs
  • T-475 Synch Stripe spect. Eric Torrence (U.
    Oregon) is PI
  • 2. Collimator wakefield studies
  • T-480 S. Molloy (SLAC), N. Watson (Birmingham
    U.) co-PIs
  • 3. Linac BPM prototype
  • BPM triplet C. Adolphsen, G. Bowden, Z. Li
  • 4. Bunch Length diagnostics for ESA and LCLS
  • S. Walston (LLNL) and J. Frisch, D. McCormick, M.
    Ross (SLAC)
  • 5. EMI Studies
  • G. Bower (SLAC) US-Japan collaboration with Y.
    Sugimoto (KEK)

Mike Woods Talk in Breakout Session
See Mike Woods Talkin Breakout Session
15
Detector Simulation/Reconstruction Group
SLAC Sim/Recon Group Ron Cassel
Norman Graf Tony Johnson Jeremy
McCormick
  • Supports SiD, ALCPG, and international
    simulation effort. Tutorials, Workshops,
    Snowmass Resource CD
  • Provides physics simulation and data samples for
    physics analysis e.g. 1 ab-1 sample of all
    SM Processes at 500 GeV
    http//www.lcsim.org/datasets/ftp.html
  • Provides full detector simulation in Geant4.
    Runtime detector description in XML, making it
    easy to study design variations.
  • Provides Java-based reconstruction analysis
    framework
  • Developing Tracking and Calorimeter
    reconstruction code

16
Calorimetry drives the SiD Design, and Particle
Flow drives the Calorimetry
Measure the energy of every particle, not the
energy deposited in calorimeter modules. High
transverse and longitudinal segmentation is
needed to distinguish individual particles.
  • 1

17
Starting Detector Comparisons with PFAs
Vary B-field
3.63 GeV 89.3 GeV 63 -gt 38/sqrt(E)
3.78 GeV 89.2 GeV 54 -gt 40/sqrt(E)
SiD SS/RPC - 4 T field
SiD SS/RPC - 5 T field
-gt Somewhat worse performance in smaller field
18
SiD Detector RD at SLAC
  • SLAC Participants
    Collaborators T. Barklow
    W. Cooper
    (FNAL) M. Breidenbach
    M. Demarteau (FNAL)
    D. Freytag
    R. Frey (Oregon)
    R. Herbst
    V. Radeka (BNL) J. Jaros
    N.
    Sinev (Oregon) D. Su
    D. Strom
    (Oregon) T. Nelson
    Annecy and UC
    Davis
  • Major Activities are closely integrated with
    FNAL, BNL, Oregon, Annecy
  • Front-end electronics design for Si/W ECAL
  • Ecal mechanical design
  • Tracker mechanical design
  • Si sensor development for tracker
  • Pattern Recognition Code and Detector Simulation
    for Tracker
  • VXD Concept, Simulation, and Performance
  • Physics Analysis and Detector Benchmarking
  • Costing Tools

19
SiD ECAL overview
  • 20 layers x 2.5 mm thick W
  • 10 layers x 5 mm thick W
  • 1mm Si detector gaps
  • Preserve Tungsten RM eff 12mm
  • Highly segmented Si pads 12 mm2

20
Conceptual design
SLAC/ Annecy
  • Very aggressive mechanical and electronics
    integration is needed to preserve the Moliere
    radius

W plate 200 Kg Module 7000 Kg
  • W plates joined by rods
  • Wafers on W
  • ReadOut chips on wafers

FEA analysis is in progress
21
Wafers and R/O
SLAC/BNL/Oregon/Davis
  • Single MIP tagging (S/N 7)
  • Dynamic range 0.1 2500 MIPs
  • Bump bonded to the detector
  • Low power lt40 mW per wafer with power pulsing,
    passive cooling
  • 4 deep buffer for bunch train

22
KPiX SiD Readout Chip
2 x 32 Prototype 2 now being tested at SLAC. 3
is on the way. Full chip in the fall.Use for
ecal and µstrips adapt for hcal.
One cell. Dual range, time measuring, 13 bit,
quad buffered
2 x 16 Si Strip
See Martys talkin Breakout
2x16 Calorimetry
Prototype 2x32 cells full 32x32
23
SiD Integrated Tracking
  • Silicon Tracker is fast (1 BX only)
  • Silicon is robust(No HV trips)
  • Tracking System VXD Si Main Tracker Ecal

24
Pixel Vertex Tracker VXT
FNAL Mech Design
  • SLAC Conceptual Designand Simulation
  • 5 layer cos? lt 0.976
  • Pattern Recognition ?100

25
Promising VXT Technology
  • Chronopix being developed by
    Oregon/Yale/Sarnoff
  • Store hit times in Macro Pixelduring bunch
    train, readout after
  • Scrap Macro/micro. Miniaturize Macro instead.
  • MacroPixel design complete prototype detector
    design next.
  • Good opportunity for SLAC
    involvement

26
Si Tracker _at_ SLAC
  • Stand Alone Barrel Tracking Sensor
    Module Design

Microstrip Detector Designand Integration with
KPiX
Tracking Efficiency vs Pt (GeV/c)
See talk by Tim Nelson in Breakout Session
27
Detector Performance Requirements
  • What are the tradeoffs between detector
    performance and physics performance? What
    detector performance is really needed?
  • Processes under study by T. Barklow
  • Jet Resolution Higgs Mass Error vs ?Ejet
    Higgs Self Coupling Error vs ?Ejet
  • Tracker Momentum Resolution Higgs Mass Error
    vs ?pt/pt2 Ecm Accuracy vs ?pt/pt2 SUSY
    Mass Error vs ?pt/pt2
  • Detector Calibration Runs Run at the Z or
    will radiative Zs do?
  • These studies benchmark SiD performance.
    Eventually they will be utilized to compare and
    optimize SiD Design variations.

28
Whats Next for SiD_at_SLAC...?
  • .ambitious plans!
  • Ecal KPiX, New Si Sensors, Prototype, Beam
    Test, Mechanical design
  • Main Tracker Tracker Si Sensor, Prototype
    Sensor Modules, Beam test
  • Vertex Tracker Evaluate Performance,
    Mechanical Design (with FNAL), Develop
    Sensor
  • Reconstruction Code Perfect PFA, Tracking
    Pat Rec
  • Benchmarking/Analysis/Design Optimization
    Detector Performance Requirements, New
    Physics Analyses, Global Optimization, Subsystem
    Optimization.

29
Expanding Effort on SiD
  • Present program is not adequately staffed or
    funded to realize our ambitious
  • plans, meet the GDE timeline, or secure a
    leading role for the US community.
  • Initial startup of SLAC/Atlas effort presents
    challenges for SiD effort.
  • New SiD Personnel are needed for design and
    optimizationMechanical engineer, mechanical
    technician, computer support, postdoctoral
    researchers, simulation physicist, visitors
  • New SiD Si Lab Space is needed tentatively
    identified
  • KPiX development, Sensor development
  • Additional SiD MS is needed to support proof of
    principle RD.
  • SLAC is a natural site to lead ILC detector
    development with our user community.
  • We have much of the needed engineering,
    construction facilities, computing and simulation
    infrastructure, and test beams, and can serve as
    a center for design and analysis activity.


30
Backup Slides
31
ILC Detector Requirement for Tracking
Goal ?pt/pt2 5 x 10-5 GeV-1 10X LEP, and
3X CMS
Higgs Tag and Recoil Mass Measurement
Recoil Mass (GeV)
Recoil Mass (GeV)
  • Boost Effective Luminosity
  • Improve Tag

Recoil Mass (GeV)
Recoil Mass (GeV)
32
Accounting for Costs
Cost by subsystem
Cost minimum vs. tracker radius
Martys Excel Spreadsheet allows study of costs
vs detector parameters, includes fixed costs.
Need for detector optimization.
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