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Flexible Transceivers Based on TimeFrequency Representation Theory

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Title: Flexible Transceivers Based on TimeFrequency Representation Theory


1
Flexible Transceivers Based on Time-Frequency
Representation Theory
  • On the behalf of URANUS EU FP6 project
  • Harri Saarnisaari, Univ. of Oulu / CWC, Finland
  • Alexsander Vießmann, Univ. Duisburg-Essen,
    Germany

2
Outline of Tutorial
  • A very brief introduction to URANUS project that
    is behind this tutorial
  • Motivation
  • Why we want flexible ratios with time frequency
    processing
  • A brief introduction to Gabor analysis
  • Mathematical definitions
  • Computation
  • Time-frequency processing
  • Transmitters and receivers in time-frequency
    domain
  • Doubly-dispersive channel modelling
  • Simulation results
  • Time frequency receiver vs conventional UMTS
    receiver
  • Time frequency symbol synchronization techniques
  • Other items of interest, future concepts
  • Platform demonstration

3
URANUS Project
  • Universal RAdio-link platform for efficieNt
    User-centric accesS
  • The aim of the project
  • Is to develop flexible baseband transceiver
    architectures based on time-frequency signal
    processing
  • More precisely, the Gabor transform
  • Find a parameterized architecture
  • The modulation (mode) can be changed just
    changing the parameters, not transceiver chains
  • Demonstrate the main elements

4
URANUS Project
  • Partners
  • LETI (F) coordinator
  • STM (F)
  • TID (E)
  • CWC (FI)
  • UNIK (G)
  • IASA (GR)
  • PUT (PL)
  • Duration 36 months
  • 2006-2008
  • EC contribution 2,6 M
  • Deliverables
  • www.ist-uranus.org

UniK
5
Motivation
6
Motivation
  • Wed like to transmit and receive existing
    multitude of modulation methods by one efficient
    transreceiver
  • As well we want to be future proof such that our
    flexible transceiver could handle also future
    signals that increases the life cycle of our
    device
  • Or if not our devices then at least our designs
  • Wed like to do this without sacrificing too much
    on performance, and achieve some benefits if
    possible
  • Since we know that flexible solutions are not
    necessarily as optimal as point-optimal solutions
  • It would be a benefit if the same receiver
    structure could be used also for synchronization
    and channel estimation
  • No need to define separate chains for these

7
Restrictions
  • We consider waveforms in the physical layer (PHY)
  • No coding or decoding, no MAC, etc,
  • Just modulation and demodulation, and
    synchronization and channel estimation
  • We consider the base band part
  • No RF part at all although that has a major
    impact on actual multimode transceivers

8
Conventional Approaches to Flexible Radio
  • Current approaches to the baseband of flexible
    radios rely either on (in increasing order of
    complexity)
  • Multiple parallel chains (Fig 1)
  • Easy/rapid implementation (follow a standard)
  • Improved performance if switching between them is
    optimized
  • However Limited scope (to existing air
    interfaces)
  • Common reusable modules or specialized
    instruction sets (Fig 2)
  • Increased processing speed
  • More efficient power consumption
  • However Limited scope (must be developed on a
    case-by-case basis)
  • Software defined radio (SDR) (Fig 3)
  • Full reprogrammable flexibility
  • Best performance possible (since optimal
    algorithms can be implemented)
  • However Large power consumption / Limited
    reconfiguration speed

9
Different Architectures
1 multiple HW
2 single HW
10
URANUS Approach
  • We selected a solution (Fig 4) that includes a
    flexible, reconfigurable hardware into which most
    part of the transceiver operation can be fitted
  • The building blocks of the transceiver chain are
    parameterized
  • Canonical parametric description (CPD) of the
    transceiver
  • Modulation method (the mode of the transceiver)
    is specified by these parameters
  • We see the following benefits of this solution
  • Less die area
  • Less power consumption
  • Fast switching time from one mode to another
  • Beneficial, e.g., in vertical hand over (VHO)
  • Fast time to market

11
Pros and Cons at a Glance
12
Background and Further Motivation
  • Single carrier (SC) signals are traditionally
    received using time domain receivers
  • Complexity and power consumption of the time
    domain filters and equalizers are a big issue,
    especially with high sampling rates, i.e., data
    rates or bandwidths
  • A way to reduce the complexity is to use
    frequency domain equalizers (FDEs)
  • As proposed, e.g., in 3GPP SC-FDMA
  • As well as in UMTS for chip level equalization

13
Background and Further Motivation
  • Multi carrier (MC) signals are naturally
    transmitted and received in frequency domain
    using (I)FFT
  • Adoption of empty subcarriers at band edges even
    eliminates the need for digital pulse shaping
    filters in the transmitter and receiver
  • Therefore, frequency domain transceiver may be
    seen as a candidate flexible baseband
    architecture
  • But, can we do something else, even better?

14
Background and Further Motivation
  • MC signals (OFDM) have a benefit in frequency
    selective channels
  • The radio channel is a constant single tap
    channel over some subcarriers
  • Simple single tap channel estimators and
    equalizers can be used
  • No filtering
  • However, in double selective channels where the
    channel is time varying even within a symbol we
    can do something else
  • This else is time frequency (TF) processing the
    topic of this tutorial

15
Background and Further Motivation
  • In TF processing we divide the signal into TF
    grid
  • In OFDM division is only in F direction
  • There are many possibilities for TF processing
    but we selected the Gabor transform as our basis
  • Discrete Gabor transform (DGT) and its inverse
    (IDGT)
  • A reason is that it is a generalized MC signal
    (GMC signal), a possibility in the future
  • Furthermore, it can be efficiently implemented
    through filter banks or short time Fourier
    transform (STFT)

16
Time Frequency Processing
17
TF Signal Representation
  • The main working horse is the discrete Gabor
    transform (DGT) and its inverse (IDGT)
  • See right
  • Function gn is called the synthesis window
    since the signal sn is reproduced from its
    Gabor coefficients clm by it
  • Function wn is called the analysis window since
    the Gabor coefficients are calculated by it
  • Also name Gabor atom is used
  • T is the atom separationin time (grid size in
    time)
  • F 1/M is the separation in frequency
  • L is the number of time slots
  • M is the number of frequency slots
  • N is the number of signal samples in time domain
  • Note similarity with FFT - IFFT pair

18
TF Signal Representation
  • Atoms can overlap
  • Their shape can be selected to fit for
    thesignal and channel

19
TF Signal Representation
  • We usually require that the lattice constants T
    and F satisfy TF 1
  • Means that atoms cover all the TF-grid
  • Means that a signal can be fully represented by
    its Gabor transform
  • TF 1 is called the critical case
  • Used in the IFFT phase of the OFDM
  • TF lt 1 is the overcritical case
  • TF gt 1 is the undercritical case
  • In terms of M, L and N the condition TF 1
    becomes LM N
  • The number of grid points is equal or larger than
    the number of samples

20
TF Signal Representation
  • The selection of analysis and synthesis windows
    is not arbitrary
  • If we select the synthesis window to be a dual of
    the analysis window, then the synthesis is
    possible
  • E.g., rectangular windows
  • If the synthesis window is a tight dual of the
    analysis window, it is the analysis window
    multiplied by a constant
  • There exits tools to calculate windows and their
    duals
  • See, e.g., books and web pages concerning Gabor
    analysis or STFT

21
Ways to Apply I
  • Take a signal with bandwidth B and duration Ts
    and represent it by its Gabor coefficients
  • Like UMTS, GSM, OFDM,
  • If the signal has N samples in time domain,
    remember that L and M satisfy the design
    constraint LM N
  • Select suitable atoms, e.g. based on radio
    channel characteristics
  • Use synthesis to regenerate the signal and
    analysis to compute the Gabor coefficients
  • Results transmitter and receiver structures for
    any signal
  • Will be discussed later

22
Ways to Apply II
  • It is easy to see that DGT is a generalization of
    FFT
  • Atoms (windows) added
  • Temporal domain added to coefficients
  • 1. Think the Gabor coefficients clm as symbols to
    be transmitted in the TF-grid and obtain a
    generalized multicarrier (GMC) signal
  • Future communications?
  • 2. See that usual MC signals (OFDM and MC-CDMA)
    are a special case with rectangular atom and L
    1
  • 3. See that usual linearly modulated SC signals
    area special case with M 1 and the atom as a
    pulse shaping function
  • As a consequence, a GMC system can be used to
    transmit GMC, MC and SC signals

23
Computation
  • The formulation of DGT is equal to the short time
    Fourier transform (STFT)
  • compute using (I)FFT and window functions
  • Another way is to apply filter banks and
    especially uniform DFT filter bank that uses FFT
  • We have
  • Analysis filter bank (AFB) to calculate the Gabor
    coefficients
  • Synthesis filter bank (SFB) to reproduce the
    signal from the Gabor (or STFT) coefficients

24
Uniform DFT FB
  • Size of (I)FFT M
  • Filters Ei (z) and Ri (z) are polyphase
    components of the analysis and synthesis windows
  • Up- and downsampling units (Note in this figure
    N grid timeT in samples)

25
Transmitter
26
Transmitter
  • GMC
  • synthesize the signal using the synthesis formula
  • MC
  • OFDM is simply seen as special case and yields a
    simple implementation by IFFT
  • SC
  • Instead of usual pulse shape filtering it is
    possible to use filter banks for pulse shaping
  • Can be seen as TF based filtering, generalization
    of well known frequency domain filtering

27
SC Transmitter
  • Polyphase components Pi (z) include both the
    analysis window and pulse shaping filter
  • ? is the upsampling factor for pulse shaping
  • Also here N grid timeT in samples

28
SC Transmitter
  • In this structure windows can be used for
    sidelobe reduction
  • The number of computations can be reduced by
    nulling frequency components that have
    insignificant components not affecting the
    quality of the signal
  • In this figure the complexity of the
    FBtransmitter is 20x higher in terms of complex
    multiplications
  • However, if the sidelobe level of the
    conventional TX is reduced its complexity is
    increased

29
Receiver Channel Modeling and Demodulation
30
Receiver
  • We concentrate on receivers based on TF
    processing
  • Not special cases
  • Demodulation
  • Correlation approach
  • Equalization
  • Channel modeling approach
  • Symbol synchronization

31
Receiver Channel Modeling
  • In the radio channel the transmitted signal s(t)
    is modified
  • Modification defined by operation Hs(t)
  • In a single tap (only LOS) channel a single time
    or frequency domain (FD) tap is sufficient to
    define the whole channel
  • Traditional model
  • In frequency selective channels several FD taps
    are needed
  • Channel assumed to be constant over a frequency
    slot, but several bands are needed to cover the
    whole signal bandwidth
  • A FIR filter model in time domain
  • In double spread channels frequency selective
    channels are time varying
  • Problems if within a symbol
  • Channel assumed to be a constant within a
    time-frequency cell, several cells needed to
    cover the whole used TF plane
  • TF processing

32
Receiver - Channel Modeling
  • All these approaches yield to a single tap per F
    slot or TF cell channel models-- No filtering
    -- Are approximations of real radio channels
  • In DGT based processing a research topic is to
    select atoms that best fit for the used radio
    channel-- a degree of freedom here-- robust
    windows good both for easy and bad channels

33
Receiver - Channel Modeling
  • If coherent modulations (like PSK, QAM) are
    applied pilots are needed to find the channel
    coefficients
  • The number of pilots depends on the expected
    operational environment
  • Channel, relative velocity, etc.
  • There should be a pilot per constant frequency
    slot (OFDM) or per constant TF cell (TF
    processing)
  • Some short of interpolation between pilots might
    also be used
  • If TF processing is applied to existing (legacy)
    signals their pilot structure has to be utilized

34
Receiver - Demodulation
  • Assume linear modulation
  • Received signal y (t ) b(k) s(t ) n (t )
  • b(k) kth data symbol
  • s(t ) pulse shape
  • n (t ) additive noise
  • Sufficient statistics in white Gaussian noise are
    ?v (k) ?t y (t )s (t )
    (discrete correlation)
  • Assume that channel H affects the signal. Then
    sufficient statistics are ?v (k) ?t y (t ) ( H
    s(t ) )

35
Receiver - Demodulation
  • In TF processing we do correlation in TF domain
  • We need
  • TF form of y (t )
  • Analysis of y (t ) results Gabor coefficients
    c(l,m)
  • TF form of H
  • Single tap 2D channel model results taps H (l,m)
  • TF form of s(t )
  • Analysis of pulse shape s(t ) results
    coefficients u(l,m)
  • As a consequence, we have ?
    v(k) ?l,m c(l,m) ( H (l,m)
    u(l,m) )
    ?l,m ( c(l,m)H(l,m) ) u(l,m)
  • Note that the sum is over l and m in TF domain

36
Receiver - Demodulation
  • The sufficient statistics can be used (as usual)
    for
  • ML receiver
  • Decorrelation receiver
  • MMSE receiver
  • Equalizer receiver
  • Observe close connection to frequency domain
    receivers
  • TF processing is replaced by Fourier transform
    (or FFT in practice)
  • Since channel taps H (l,m) are unknown pilots are
    used to estimate them
  • 2D channel estimation considered in deliverables

37
Receiver - Demodulation
  • Reference signal is TF form of s(t ) or pilots
    depending on needs
  • Needs
  • AFB
  • Reference/pilot generator or both AFB for those
  • Channel estimation unit
  • Demodulator (desired receiver type)

38
Receiver - Demodulation
  • More detailed look of the receiver
  • The correlator block denotes the receiver type
    (ML, MMSE, equalizer, )
  • The blocks are parameterized by variables ?
  • Mode (modulation) is changed by changing the
    parameters within a block

39
Receiver - Demodulation
  • Vector model of sufficient statisticsv Ab
    n, A(i,j) correlations of channel affected
    signals Hs(t )
  • ML arg max 2RebHv - bHAb
  • Decorrelation b diag( A-1 v )
  • MMSE b diag( (AN0I)-1v )
  • Equalizer b(k) ?l,m c(l,m) (H (l,m) u(l,m) )
    / H (l,m)2 or even b(k) ?l,m c(l,m)
    u(l,m) / H (l,m)

40
Receiver Simulation Results
  • We applied the idea for UMTS
  • It is a challenging thing since the reference in
    UMTS is, due to scrambling, time varying
  • TF representation of the reference has to be
    calculated again for each input block
  • The simulation chain includes a common
    transmitter
  • However, there exist a variety of ways to do the
    receiver
  • Traditional UMTS receivers
  • Time domain correlator
  • Frequency domain chip level equalizer
  • TF based
  • Matched filter
  • TF based equalization

41
WCDMA Simulation Chain
URANUS and usual approach differ only in this
block
42
TF Architecture I Correlator
43
TF Architecture II Combiner
44
Sufficient Statistics (a recall)
  • Correlation
  • Generalization
  • MRC ( Matched Filter)
  • Zero Forcing (ZF)
  • MMSE
  • Combiner

h replaced by a generic variable z
b is for (zc) term in the previous Fig
45
UMTS Conventional FDE
  • Note similarity to UMTS FDE shown here
  • Underlying approximation behind this channel
    matrix R is circulant
  • F FFT matrix
  • H diagonal matrix

46
Architecture II Simpler version in multiuser
case
u1
correlator
If multiple codes (base station) are used then
this structure needs a chain for each code -gt
complex
?(1)l,m
signal waveform generator
p1
AFB2 g(n)
Channel combiner
Cl,m
bl,m
y
AFB1 w(n)
uI
correlator
Hl,m
?(I)l,m
signal waveform generator
pI
AFB2 g(n)
Equivalency holds between these two -gt much
simpler structure
47
Simulation Results
  • WCDMA conventional time domain matched
    filter implementation
  • GMC architecture I

Spreading factor S 16
System load (I/S) 1/4
Perfect matching
48
Simulation Results
Architecture II vs FDE
Perfect matching
Does TF processing offer any benefits in faster
fading channels is still an open question
49
Receiver - Synchronization
50
Receiver - Synchronization
  • OFDM symbol timing is usually proposed in time
    domain crosscorrelation techniques although
    otherwise a frequency domain receiver chain is
    used in OFDM
  • However, it is possible to apply frequency domain
    processing in OFDM as well
  • It is indeed very well known (or should be) that
    frequency domain matched filtering yields to a
    fast acquisition
  • See spread spectrum (e.g. GPS) literature
  • Herein, we briefly describe how TF idea can be
    used for joint time-frequency acquisition
  • being a special application of STFT filtering

51
Receiver - Synchronization
  • Most timing systems are based on a pilot signal
  • Know symbols are transmitted
  • Symbols are often taken from a pseudo noise or,
    equally, direct sequence (DS) code
  • Therefore, considered DS acquisition is a generic
    approach
  • Usually timing and frequency uncertainties are
    divided into small cells
  • A cell with particular trial timing and frequency
    values is called a test cell
  • The receiver tries to find in which cell the
    signal is
  • After acquisition timing and frequency estimates
    are usually fine tuned
  • Tracking mode
  • Since acquisition is based on threshold
    comparison of decision variable to a threshold
    also thresholding device is needed
  • Based on simulations or hardware test
  • Automatic based on detection theory often CFAR

52
Receiver - Synchronization
  • It is well known that FFT based filtering is
    computationally efficient way to implement
    filters
  • Block based processing
  • The filter length is a natural block size
  • Overlap-save (OLS) or overlap-add (OLA) methods
    have to be used for proper convolution
  • Results latency related to the block size.
  • In real time applications (like in audio SP),
    this latency may be unacceptable, especially with
    long filters
  • Latency can be reduced using block or partitioned
    filtering where the filter is chopped into
    smaller blocks
  • It is fairly easy to see that block filtering is
    a special case of the short time Fourier
    transform (STFT) based filtering
  • No windows, no overlap
  • Can be implemented by STFT or filter banks (FB)
  • It is quite natural to apply STFT filtering to MF
  • Generic MF
  • Lower latency to decision unit
  • The output block length is N/L chips where L is
    the number of non-overlapping blocks
  • In the traditional implementation the output
    block size is N chips
  • Windows are known to be a necessary element in
    efficient spectrum sensing since they reduce
    spectrum leakage causing wider spectrum
  • Applications narrowband interference mitigation,
    spectrum sensing in cognitive radios
  • Although here discussed as MF it can be used also
    as a generic filter
  • Pulse shaping applications

53
Receiver - Synchronization Idea of Joint Timing
and Frequency Acquisition
Leave FFT out and you have usual partitioned
filter for timing - Just sum as in DC
component PMFs denote partitioned parts of the
MF
A test cell with particular trial timing and
frequency values
54
Receiver - Synchronization Frequency Domain
Partitioned MF Joint Acquisition
No windows No overlap The zero frequency FFT
bin corresponds the output without Doppler
processing This means that the sum of columns
is needed if Doppler processing is not required.
55
Receiver - Synchronization TF Filtering
windows, overlap, no Doppler
A filtering cycle results an output block of size
M, L cycles needed to finish filtering of a N
chip DS signal
56
Receiver - Synchronization Results
  • We applied the proposed acquisition scheme for
  • DS acquisition
  • Joint timing-frequency acquisition of DS signals
  • GPS BOC(1,1)
  • Effects of
  • windows,
  • overlapping,
  • multipath channel

57
Receiver - Synchronization Results DS
acquisition
Flat Rayleigh channel -No overlap -No
windows Code length N64 MR32 Mwindow
size Rhop size (controls overlap, MR no
overlap) Nice match between theory and
simulations
58
Receiver - Synchronization Results DS
acquisition
Frequency selective Rayleigh channel -two
equpower taps, -one chip apart --No overlap --No
windows Code length 64 MR32 Mwindow
size Rhop size Px2 either 1. or 2.
is accepted as the correct path -diversity gain!
Selects between two and only another is OK
59
Receiver - Synchronization Results DS
acquisition
Flat Rayleigh fading channel -overlap -windows -eq
ual Pfa fair comparison !! Code length 64 M64,
R varies Mwindow size Rhop size Pfa set by
simulations for windowing overlap cases
Windowing causes losses if Pfa is kept
constant! - Even 3 dB
60
Receiver - Synchronization Results joint DS
acquisition
AWGN channel -no overlap -no windows Code length
1023 (GPS code) M varies Mwindow size KFFT size
for Doppler processing It is known that the
system has -Mismatch loss if frequency error
increase, reduce by larger FFT size or, equally,
smaller block size -Scalloping loss if actual
frequency is between the two frequency bin
centers
61
Receiver - Synchronization Simulations
  • K16, M64
  • Freq. cell size FT1 (1 kHz if T1 ms)
  • Performance decreases as FT increases
  • As it should
  • Or if FT is between multiples of 1 (scalloping
    case)

Probability 1 is achieved by input SNR -15 dB,
this agrees with theory
In FT1.5 case the actual freq. is between the
two bins and the receiver selects half of time
the wrong cell
62
Receiver - Synchronization Simulations
  • K64, M32
  • Freq. cell size FT0.5 (500 kHz if T1 ms)
  • Scalloping loss reduction scheme
  • Larger FFT with zero padding

Input SNR
The performance is better now! All FTs close the
ideal.
63
Other Topics
  • Other issues considered in the project that are
    of interest

64
Selection of Windows
  • It is possible to optimize windows such that used
    approximated 2D single tap channel model results
    minimum error
  • Signal power as reference
  • Results show that minimum error is obtained with
    zero delay and Doppler spread
  • Error increases as either one or both increase
  • However, in many practical case the error is of
    order -20 dB or smaller

65
Selection of Windows
  • Here is example for UMTS tight windows with
    corresponding residual channel modeling errors
  • N denotes time grid size T in samples, M is the
    FFT size
  • See TF N/M lt 1, overcritical case
  • Sampling rate 2 samples/chip

66
PAPR Reduction
  • MC signals have PAPR problem
  • Does GMC has that too, or does windowing help on
    this?

67
PAPR Characteristc for Various Window Shapes
Propability that PAPR is larger than a threshold
PAPR0 PAPR reduction method not
applied Result Windows are not helpful on this
68
Adaptive Bit and Power Loading
  • Adaptive bit and power loading for GMC signals
  • Not MC or SC but GMC
  • Can TF characteristics used succesfully?
  • Do TF characteristics cause harm or new problems
    when old methods are applied?

69
Example Simulation Results exponentially
decying power channel
  • Hughes-Hartogs (H-H) algorithm applied
  • As can be seen, more bits are put there where
    channel is good

70
Power allocation based on the theoretical formula
approximating negligible overlapping of atoms
Power allocationbefore negative levels nulling
Power allocationafter negative levels nulling
Result Less power to bad cells
71
GMC Signals for Double-Spread Channels
  • We recognized that OFDM is a special case of GMC
    signals
  • Undercritical due to cyclic prefix
  • After IFFT TF1 holds but not after adding CP
  • OFDM is indeed a biorthogonal signal since the
    transmission and receiver windows are biorthogonal

72
GMC Signals for Double-Spread Channels
  • OFDM
  • CP handles inter block interference (IBI) between
    OFDM symbols due to delay spread
  • However, inter carrier interference (ICI) due to
    Doppler spread remains a problem
  • Use of CP wastes TF space (capacity)
  • Can we do better?
  • E.g., use well localized pulses, critical or
    overcritical region (instead of undercritical) in
    GMC signals

Possible in GMC
OFDM
73
Multicarrier signaling in the overcritical TF
region
i.i.d. information symbols (e.g., QAM)
precoding matrix (tall) design parameter
TF symbols
modulation matrix (fat) design parameter
LTV channel operator
AWGN
Channel diagonalization
received block (time domain)
TF channel representation
error term due to AWGN and imperfect channel
diagonalization
74
Numerical results
  • Channel model (discrete time)
  • 6 i.i.d. taps
  • Doppler spread (normalized to sampling
    freq.)
  • Proposed system parameters
  • M 64 sub-carriers
  • Redundancy in time domain (?1, 2, 3,
    4)
  • Rectangular transmit pulse
  • Optimized precoder for SNR20dB
  • CP-OFDM parameters
  • Varying of sub-carriers
  • Proposed scheme significantly outperforms OFDM

75
Numerical results
  • Simulation parameters
  • 64 sub-carriers
  • ? 4
  • Modulation 4-QAM
  • Code rate 1/2
  • Code (3,6) LDPC of length 1008 bits
  • Results
  • LMMSE performance close to full CSI processing
  • TF decoupler incurs a 3dB loss
  • OFDM fails (significant error floor)
  • Improved performance with increasing codeword
    length

76
URANUS
Implementation of GMC Transceiver in a
Demonstrator Platform
Presentation by Peter Jung, Alexander Vießmann,
Christoph Spiegel representing the URANUS
partners UDE, CEA-LETI, TID, TUKL, UOULU
77
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure
  • Building Blocks
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

78
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure
  • Building Blocks
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

79
Main Objective ofthe URANUS Validation Platform
/1
  • Proof of Viability and Feasibility of the URANUS
    GMCR Concept on a Commercially Available
    Hardware, the Greenside Platform
  • Software and Hardware Complexity Analysis of the
    URANUS GMCR Concept
  • Identification of Advantages of the URANUS GMCR
    Concept compared to conventional realisations
  • Industrial Exploitation Opportunities, i.e.
    Application Specific Instruction Set Processor
    (ASIP) Integration Ready Concept

80
Main Objective ofthe URANUS Validation Platform
/2
  • The main task for the URANUS Validation Platform
    is to develop a flexible validation platform for
    key components of the URANUS concept.
  • To reach this goal the work plan foresees
    different steps
  • Specification of the building blocks.
  • Architectural exploration of key building blocks.
  • Design of building blocks for the integration
    into the validation platform.
  • Baseband validation of the URANUS transceiver
    prototype under realistic conditions.

81
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure
  • Building Blocks
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

82
Conceivable Architectures
1 multiple HW
2 single HW
1
1
HW
SW
HW
1
1
SW
HW
2
2
2
2
SW
HW
HW
4 Uranus
3 generic SDR
CPD
SW
HW
1
1
1
1
SW
HW
2
2
2
2
83
Pros and Cons at a Glance
84
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure
  • Building Blocks
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

85
Petri Net Based Design Flow
86
Five Demonstrator Modes
  • MODE I
  • Real-Time Short-Range/Indoor Profile
  • UMTS/W-CDMA
  • 384 kbit/s service
  • WiMAX services
  • up to 20 Mbit/s
  • user defined mode
  • MODE V
  • Research Demo
  • ASIP
  • Architectural study
  • of the outer modem
  • MODE II
  • WiMAX Improved
  • Outer Modem Profile
  • high rate
  • WIMAX services
  • MODE IV
  • Research Demo Advanced Sync
  • FW implementation
  • of the advanced
  • GMCR based synchronization
  • MODE III
  • Advanced GMC Hardware Centric
  • HW implementation and optimization of HW/FW/SW
    split of
  • (future) GMCR

87
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure(Hardware Architecture,
    Protocol Stack Architecture, Building Blocks,
    Interfaces Between Building Blocks)
  • Building Blocks
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

88
Hardware Architecture Laboratory Set-up
89
Hardware Architecture ST GreenSIDE Platform
JTAG Connector
Greenside ASSP
FPGA
Interface Connector
SRAM
FLASH
Dual Ethernet
JTAG Joint Test Action Group ASSP
Application specific standard product FPGA Fiele
programmable gate array SRAM Static Random
Acess Memory
90
Protocol Stack Architecture
91
Building Blocks Scheduling
92
Building Blocks Scheduling
93
Building Blocks Scheduling
94
Building Blocks Scheduling
95
Building Blocks Scheduling
96
Building Blocks Transmitter
97
Building Blocks Receiver
98
Interfaces Between Building Blocks Demo Mode I
99
Interfaces Between Building Blocks Demo Mode II
100
Demo Mode II Summary
  • Highlights demonstration mode II
  • WiMax codes analyzed
  • Performance results floating point and fixed
    point
  • Architecture exploration
  • VHDL implementation finished
  • FPGA utilization reduced from 70 to 25
  • Overall area around 3700 slices
  • Ongoing developments
  • Testing
  • Verification

101
Interfaces Between Building Blocks Demo Mode III
102
Demo Mode III Architecture
103
Demo Mode III Analysis Filter Bank (AFB)
104
Demo Mode III Complexity
XC2V3000 14336 slices 96 BRAM 96 Multipliers
105
Demo Mode IV Architecture
  • The sync block itself does the matched filtering
    operation using STFT principle
  • A generalized frequency domain filtering process
  • Windows and overlapping are possible unlike in
    the usual frequency domain processing

Block diagram of the operations of the SYNC unit
106
Demo Mode IV Scheduling
107
Demo Mode V Flexible Trellis Processor
(FlexiTreP)
  • Exploit programmability
  • Simple programming model
  • Decoding algorithms e.g. Log-MAP, Viterbi
    (control flow)
  • Exploit hardware reconfigurability (data
    management)
  • Fast context switching
  • Multi context instructions simplifies
    instructions reduces program size
  • ?Partially dynamically reconfigurable ASIP
  • Specific application application knowledge is
    key
  • Full ASIP approach i.e. no predefined
    configurable pipeline template
  • Just enough flexibility energy efficiency
  • Assembler code

108
Demo Mode V Desired FlexiTreP Features
  • Support of all trellis-based decoding techniques
    in current standards
  • Binary Turbo Decoding
  • Constraint length between 3 and 5
  • Arbitrary generator and feedback polynomials
  • Rates down to 1/7
  • Interleaver table loadable
  • Doubinary Turbo Decoding
  • Constraint lengths 4 and 5
  • Arbitrary generator and feedback polynomials
  • Rates down to 1/3
  • Binary MAP and Viterbi decoding
  • Constraint length between 5 and 9
  • Arbitrary generator and feedback polynomials
  • Rates down to 1/4

109
Demo Mode V Architectural Approach
  • Incorporate the Viterbi Decoder

MAP
BUF
BUF
Survivor MEM
FWD REC
BM
  • Architectural Template for an ASIP for
    trellis-based Decoding

110
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure
  • Building Blocks(Application Layer, Transport
    Network Layers, Radio Resource Management, Medium
    Access Control Logical Link Control, Outer
    Modem, DSP Based Inner Modem, FPGA Based Inner
    Modem)
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

111
Communication Layers
  • Application Layer
  • Firmware Identifier
  • Canonical Parameters Configuration Manager
  • Data Transfer Controller
  • High Level Transceiver Scheduler
  • Real-Time Measurements Extractor
  • Video Stream Repeater
  • Miscellaneous Application Layer Messages

112
Communication Layers
  • Application Layer
  • Firmware Identifier
  • Canonical Parameters Configuration Manager
  • Data Transfer Controller
  • High Level Transceiver Scheduler
  • Real-Time Measurements Extractor
  • Video Stream Repeater
  • Miscellaneous Application Layer Messages
  • Transport Network Layers
  • Ethernet Driver
  • ARP
  • IP Stack
  • UDP Stack
  • Time Stamper

113
Communication Layers
  • Transport Network Layers
  • Ethernet Driver
  • ARP
  • IP Stack
  • UDP Stack
  • Time Stamper
  • Radio Resource Management
  • Initialization Module
  • Transmission Management Module

114
Communication Layers
  • Radio Resource Management
  • Initialization Module
  • Transmission Management Module
  • MAC LLC
  • ARQ Module

115
Communication Layers
  • MAC LLC
  • ARQ Module
  • Outer Modem
  • DSP Based Convolutional Coding, Reed-Solomon
    Coding and Turbo-Coding
  • FPGA Based Low Density Parity Check (LDPC) Coding

116
Communication Layers
  • Outer Modem
  • DSP Based Convolutional Coding, Reed-Solomon
    Coding and Turbo-Coding
  • FPGA Based Low Density Parity Check (LDPC) Coding
  • DSP Based Inner Modem
  • Downlink Long Scrambling Code Generator
  • Spreading Code Generator
  • Physical Channel Multiplexer
  • Digital Modulation, Spreading, Scrambling and
    Pre-coding Modules
  • GMCR Filter Bank Parameterization Module
  • ETS Generator
  • Pilot Signal Generator
  • Primary and Secondary Synchronization Sequence
    Generators
  • GMCR Based Synchronization
  • Analysis Filterbank for ETS and Pilot
  • Channel Estimation Module
  • Channel Equalization Module
  • Dual Analysis Filterbank Module
  • Correlator Module
  • SNR Estimator and LLR Generator Modules

117
Communication Layers
  • DSP Based Inner Modem
  • Downlink Long Scrambling Code Generator
  • Spreading Code Generator
  • Physical Channel Multiplexer
  • Digital Modulation, Spreading, Scrambling and
    Pre-coding Modules
  • GMCR Filter Bank Parameterization Module
  • ETS Generator
  • Pilot Signal Generator
  • Primary and Secondary Synchronization Sequence
    Generators
  • GMCR Based Synchronization
  • Analysis Filterbank for ETS and Pilot
  • Channel Estimation Module
  • Channel Equalization Module
  • Dual Analysis Filterbank Module
  • Correlator Module
  • SNR Estimator and LLR Generator Modules
  • FPGA Based Inner Modem
  • Uplink Long and Short Scrambling Code Generators
  • Architecture of GMC RX Block
  • DSP Interface
  • Sequencer
  • Analysis Filter Bank (AFB)
  • Signal Waveform Generator
  • Pilot Waveform Generator
  • Channel Estimation
  • Hadamard Multiplication
  • Correlator

118
ARM Software (Uranus library)
ARP Translation IP/ethernet hardware address
System clock
IP IP fragmentation not managed automatically
liburanus.a
UDP 1472 bytes of payload maximum
High level messages
Message passing to/from DSP
Time-stamper
APP ? Application RRM ? Radio Resources
Management MAC LLC ? Medium Access Control
Logical Link Control
High level protocol messages RRM, MAC LLC, APP
Time-stamper Enables the measurement of
the time elapsed between
different events with a precision is 50
microseconds
UDP
ARP
IP
System clock Enables the programming of
alarms with a precision of milliseconds
Ethernet driver
Message passing to and from the DSPs
Exchange of information and commands between the
ARM processor and the DSPs. To be
implemented during the integration.
119
ARM Software (memory slots)
Memory slots
The ARM main program reserves memory to
  • Preload from the GUI different CPD sets
  • Preload from the GUI of different groups of bits
    to modulate
  • Store the output samples of the transmitter after
    the modulation of the TX bits
  • Store the input samples at the receiver
  • Preload from the GUI the received input samples
    of the receiver (enabling a fake reception)
  • Store the bits demodulated by the receiver

Tests can be executed selecting the inputs from
the desired input slots and storing the results
in the selected output slots
120
GUI Main Window
There are controls for
  • Editing CPD parameters
  • Managing ARM internal slots
  • Creating automatic test sequences
  • Controlling Tests
  • Creating Video-streaming sequences
  • Controlling the videostreaming
  • Launching the real-time display

121
CPD Configuration/Edition (1 of 3)
122
CPD Configuration/Edition (2 of 3)
123
CPD Configuration/Edition (3 of 3)
124
Main window after editing a CPD set
No Changes in main window The CPD sets are
stored in files that can be used in other places
of the GUI
125
Internal ARM slots configuration
126
Main window after configuring the ARM slots
The name of the Slots configuration in use is
displayed (and stored in a file for future reuse)
127
Automatic test sequence configuration
128
Main window after Test configuration
  • The controls for the test are activated. Enabling
    the user to
  • Actual upload of the configuration to the
    platform
  • Step by step execution of the test
  • Run the automatic test
  • Pause the execution of an automatic test
  • Retrieve the test results from the ARM internal
    slots.

129
Video streaming configuration
130
Main window after video streaming configuration
  • The controls for the videostreaming control are
    activated. Enabling the user to
  • Actual upload of the configuration to the
    platform
  • Run/stop the platform behaving as a
    videostreaming bridge

131
GUI Real-time display
132
Outline
  • Main Objective the URANUS Validation Platform
  • Architecture Paradigms
  • URANUS Concept Validation
  • Transceiver Structure
  • Building Blocks
  • Performance Evaluation
  • Demonstration of the URANUS Validation Platform

133
Verification Process
134
Selected Performance Results
135
Video Streaming
136
Demonstration of the URANUS Validation Platform
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