Ch 4 Arithmetic For Computers PowerPoint PPT Presentation

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Title: Ch 4 Arithmetic For Computers


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Ch 4 Arithmetic For Computers
  • 4.1 Introduction
  • 4.2 Signed and Unsigned Numbers
  • 4.3 Addition and Subtraction
  • 4.4 Logical Operations
  • 4.5 Constructing an ALU
  • 4.6 Multiplication
  • 4.8 Floating Point

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4.1 Introduction
  • Here is some food for thought
  • How do we represent negative numbers?
  • What is the largest number possible with 32 bits?
  • What happens if a number is too big?
  • How to we handle fractions and real numbers?
  • Let's find out then

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4.2 Signed and Unsigned Numbers
  • MIPS bit numbering within a word

232 different patterns possible 0 to 232 - 1
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4.2 Signed and Unsigned NumbersContinued
  • Unsigned numbers
  • Signed numbers (two's complement)

msb used for sign this leaves 1 less bit for
number largest positive number is 2n -1 smallest
negative number is -2n
all bits used for constructing number
-1x22 1x21 1x20 -4 2 1 -1
1x22 1x21 1x20 4 2 1 7
5
4.2 Signed and Unsigned NumbersContinued
  • What is the largest unsigned number possible with
    8 bits?
  • 255 (28 1 or 2n - 1)
  • What is the largest positive number possible with
    8 bits, using two's complement?
  • 127 (27 1 or 2n-1 - 1)
  • What is the smallest negative number possible
    with 8 bits, using two's complement?
  • -128 (27 or 2n-1)

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4.2 Signed and Unsigned NumbersContinued
  • Signed load fills rest of register with sign
    bit
  • Unsigned load fills rest of register with 0's
  • lb load byte, signed
  • lbu load byte unsigned
  • used exclusively with characters

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4.2 Signed and Unsigned NumbersOverflow
  • Overflow
  • occurs when number of bits not enough to hold
    number
  • when msb bit differs from the bit to its left
  • Consider 3bits unsigned 7 1?

3 bits 0 to 7
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4.2 Signed and Unsigned NumbersOverflow Continued
  • Overflow
  • occurs when number of bits not enough to hold
    number
  • when sign bit differs from the bit to its left
  • Consider 3bit two's complement -4 1?

3 bits -4 to 3
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4.2 Signed and Unsigned NumbersComparisons
  • Signed v. unsigned comparisons
  • slt set less than
  • slti set less than immediate
  • signed number comparisons
  • sltu set less than unsigned
  • sltiu set less than immediate unsigned
  • unsigned number comparisons

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4.2 Signed and Unsigned NumbersNegation Shortcut
  • Here's a quick way to negate a number
  • invert all the bits
  • add one
  • Find two's complement representation for -5

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4.2 Signed and Unsigned NumbersSign Extension
Shortcut
  • To convert a signed word from n bits to m bits,
    where mgtn, simply extend the sign bit to fill the
    extra bits.
  • To convert an unsigned word from n bits to m
    bits, were mgtn, simply fill rest of the bits with
    a 0.
  • Convert 210 and -210 from 4 bits to 8 bits.

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4.3 Addition and Subtraction
  • Addition is carried out just like we have seen
  • Subtraction is actually carried out with addition
  • The operand is expressed in two's complement and
    then added
  • Calculate 8-10 using 8 bits

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4.3 Addition and SubtractionOverflow
  • Addition
  • Does not occur when operands are of opposite sign
  • Subtraction
  • Does not occur when operands are of the same sign
  • When does overflow do occur?

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4.3 Addition and SubtractionOverflow
  • Overflow in memory access is ignored, since
    addresses are all positive
  • Two types of arithmetic instructions are provided
    by MIPS
  • add, addi, sub all cause exceptions on overflow
  • addu, addiu, subu do not cause exceptions on
    overflow

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4.4 Logical OperatorsShift Left Logical
  • sll - shift left logical
  • shifts bits to the left (multiply by power of 2)

sll t2, s0, 8 t2 s0 ltlt 8
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4.4 Logical OperatorsShift Right Logical
  • srl - shift right logical
  • shifts bits to the right (divide by powers of 2)

srl t2, s0, 8 t2 s0 gtgt 8
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4.4 Logical OperatorsAND
  • and - bitwise AND
  • set a bit to 0 or check if bit is set to 1

and t0, t1, t2 t0 t1 t2
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4.4 Logical OperatorsOR
  • or - bitwise OR
  • set a bit to 1 or check if bit is set to 0

or t0, t1, t2 t0 t1 t2
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4.4 Logical OperatorsAND
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4.4 Logical OperatorsExample
  • Translate the following C code
  • int datastruct unsigned int ready
    1 unsigned int enable 1 unsigned
    int receivedByte 8 receiver...data
    receiver.receivedBytereceiver.ready
    0receiver.enable 1
  • Assume the following register mappings
  • datas0 receivers1

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4.4 Logical OperatorsExample Continued
  • The fields of register s1 are

sll s0, s1, 22 move receivedByte to the left
end srl s0, s0, 24 move receivedByte to the
right end andi s1, s1, fffe bit 0 set to
0 ori s1, s1, 0002 bit 1 set to 1
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4.5 Constructing an ALUAND, OR Gates
c a.b
c ab
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4.5 Constructing an ALUInverter, Multiplexor
c a
0
1
if d 0, c aelse c b
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4.5 Constructing an ALU1 bit ALU
  • Construction of a 1 bit ALU
  • capable of AND, OR

a
0
operation 0 (AND), Result a.boperation 1(
OR), Result ab
Result
1
b
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4.5 Constructing an ALU1 bit Adder
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4.5 Constructing an ALUCarryOut Signal
  • From the previous table
  • CarryOut (b.CarryIn) (a.CarryIn) (a.b)
    (a.b.CarryIn)

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4.5 Constructing an ALU1 bit ALU Continued
  • Construction of a 1 bit ALU
  • capable of AND, OR, addition

operation 0 (AND), Result a.boperation 1(
OR), Result aboperation 2(add), Result
sum(a,b)
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4.5 Constructing an ALU32 bit ALU
By adding 32 1-bit ALU's we get a 32-bit ALU
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4.5 Constructing an ALU1 bit ALU Continued
  • Construction of a 1 bit ALU
  • capable of AND, OR, addition on a and b or a and

operation 0 (AND), Result a.boperation 1(
OR), Result aboperation 2(add), Result
sum(a,b)
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4.5 Constructing an ALU1 bit ALU Continued
  • ALU for msb

ALU for the msb Set sign bit, which sets lsb If
a lt b, then a-b lt 0, thus sb(a) 0, sb(b) 1
and ab1 Less 0 for the last 31 bits
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4.5 Constructing an ALU32 bit ALU Continued
  • show 4 bit example

lsb Less is 1 or 0bit 1-31 Less is 0Result
Less
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4.6 Multiplication
  • Time warp to 4th grade
  • Multiplication basics
  • If A is m digits and B is n digits, then how many
    digits is C?
  • m n digits
  • So, if A and B are 32-bits each, C must be
    64-bits long

Product
A x B C
Multiplicand
Multiplier
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4.6 MultiplicationContinued
  • Let's look at an example

1000
00000
000000
1001000
the trailing zeros are placed to show the shift
left operation that occurs
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4.6 MultiplicationFirst Multiply Algorithm
  • show 2 x 3 example

Our 32-bit multiplicand will be shifted 32 times,
thus we need a 64-bit multiplicand register.
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4.6 MultiplicationSecond Multiply Algorithm
  • show 2 x 3 example

The lsbs of the multiplicand do not affect the
lsbs of the product once settled, since 0 is just
added. So, shift the product right instead by 1
bit each time, thus allowing for a 32-bit mc and
alu.
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4.6 MultiplicationThird Multiply Algorithm
  • show 2 x 3 example

Since the multiplier shifts right 1 bit each time
the product does, place multiplier into lower
half of product.
This final version works with signed numbers, if
the product is sign extended.
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4.6 MultiplicationContinued
  • MIPS provides two 32-bit registers for the
    product (Hi, Lo)
  • mult multiply
  • multu multiply unsigned
  • mflo move from Lo
  • mfhi move from Hi

mult s2, s3 Hi, Lo s2 x s3
multu s2, s3 Hi, Lo s2 x s3
mflo s0 s0 Lo
mfhi s0 s0 Hi
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4.8 Floating Point
  • Scientific notation
  • single digit to the left of the decimal point
  • 3.1415
  • Normalized number
  • scientific number with no leading zeros
  • 1.0x10-5 (normalized)
  • 10.0x10-6 (not normalized)
  • 1.0x2-1 (normalized)

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4.8 Floating PointSingle Precision Representation
  • Binary scientific notation, has three advantages
  • Increased accuracy
  • Increased range
  • Easier arithmetic (format is constant)
  • Single Precision Floating Point Representation
    (sign and magnitude)

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4.8 Floating PointDouble Precision Representation
  • Double Precision Floating Point Representation

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4.8 Floating PointBiased Exponents
  • Comparing negative exponents is a problem
  • a -1 exponent will appear as 11111111, while a 1
    exponent will appear as 00000001, thus appearing
    larger.
  • To expedite integer comparison of the exponent
    (as in sorting), IEEE 754 applies a bias
  • 127 for single precision
  • 1023 for double precision
  • So, now -1 appears as 0111 1110 and 1 as 1000
    0000, thus appearing as less (0 v 1 in msb)

(-1)S x (1 Significand) x 2(Exponent Bias)
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4.8 Floating PointExample
  • Show the IEEE 754 binary representation of the
    number -0.75 in single and double precision.

Converting to binary -0.7510 -0.112 In
scientific notation -0.11 x 20 In normalized
notation -1.1 x 2-1 Its IEEE 754 single
precision representation(-1)1 x (1 .1000 0000
0000 0000 0000 0000 0000 0000) x 2(126-127) 1
01111110 10000000000000000000000 Its IEEE 754
double precision representation(-1)1 x (1
.1000000000000000000...0000) x 2(1022-1023) 1
01111111110 10000000...00000
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4.8 Floating PointExample
  • What is the decimal number represented by the
    following IEEE 754 representation?
  • 1 10000001 01000....

(-1)1 x (1 .01) x 2(129-127) -1.01 x 22
-101.0 -5.010
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