The TwoStage Switch

1
The Two-Stage Switch
Nick McKeown, Isaac Keslassy...
2
Input-Queued Packet Switch
Crossbar
?1,1
1
?i,j
. . . .
N
?N,N
1
N
. . . .
3
Bipartite Graph and Matrix
inputs
1
2
3
outputs
3
2
1
4
Round-Robin Scheduling
5
Round-Robin main properties

• Simple to implement
• 100 throughput with uniform traffic

Bad with non-uniform traffic (only 1/N throughput)
6
Non-Round-Robin Scheduling
Too complex with a 100 Tbps router

• Computation complexity
• Cell time 64 B /160 Gbps 3.2 ns one clock
  cycle (today, 50 ns MWM N3)
• Ports 625 (today, 32)
• Communication complexity
• Number of bidirectional links 625 (today, 170)
• Information flow rate 0.3 Gcells/s x 20 b/cell
  6 Gbps (today, 2.5Gbps)

Up to 100 throughput with non-uniform traffic,
if optimal algorithm
7
Motivation

• Is it possible to transform the non-uniform
  traffic into a uniform one?

8
Two-Stage Switch
Internal Inputs
External Inputs
External Outputs
First Round-Robin
Second Round-Robin
9
Two-Stage Switch
Internal Inputs
External Inputs
External Outputs
First Round-Robin
Second Round-Robin
10
An optical two-stage switch
1
Phase 2
2
3
11
Two-Stage Switch main properties

• Simple to implement (no scheduler, no speed-up)
• 100 throughput (as if load-balanced traffic was
  uniform)
• Possibility to use two sides of same mirrors

• Idea not thoroughly studied
• Big problem mis-sequencing
• Even bigger mis-sequencing of unknown size

12
Open questions

• Is mis-sequencing really bad?
• If so, how easy is it to avoid it?