Thermal Management in the MultiCore Architecture

1
Thermal Management in the Multi-Core Architecture

• Adam Dutko
• David BojackManohar Bathula

2
Problem

• Moving towards more cores per chip
• How do we effectively increase heat dissipation
  while
• reducing cost
• increasing performance
• reducing time to market

3
Proactive vs. Reactive

• Reactive
• great for performance
• hard on hardware (silicon crystal fatigue,
  reduction in clock speed, rapid voltage cycling,
  not guaranteed, often passive)
• Proactive
• cool by design
• guaranteed thermal envelope
• increased hardware reliability

4
DVFS

• Dynamic Voltage and Frequency Scaling
• ACPI, cpufreq Intel Speedstep
• Cheap, Popular and Standard
• Software implementations (requires hardware)
• Primarily reactive but can be proactive

5
AM

• Activity Migration
• Core ping-pong
• Not as common as DVFS
• Hardware implementation
• Proactive design

6
Local vs. Global

• Global
• All cores in chip
• Simple hardware design
• Reduced performance
• Local
• Only core(s) in state of thermal emergency
• Complex hardware design
• Better performance

7
Its broken!

• DVFS works for now
• DVFS quickly becoming standard
• AM can be expensive
• one design mistake catastrophic (think Intel
  floating point recall! AHHH!!!)
• fundamental design shift (business likes making
  not investing money)

8
ATM

• Activity Thermal Migration
• Proactive design with DVFS and AM
• Kernel space
• User Space
• Hardware Space

9
ATM

• Focus on proactive thermal simulations
• Hardware design based on multiple failover cores
• Parallelized paths of execution using various
  cores
• Kernel modules/drivers to accommodate interrupts
  on various platforms
• AM transparent (hardware)
• DVFS component parameterized (software)