Instructor: Nachiket M' Kharalkar - PowerPoint PPT Presentation

1 / 32
About This Presentation
Title:

Instructor: Nachiket M' Kharalkar

Description:

Friendly program. Stack. Lecture 7. Nachiket M. Kharalkar. 3 ... Friendly software. Set bit 2 of port T. ldaa #000100. oraa PTT. staa PTT. Clear bit 5 of port AD ... – PowerPoint PPT presentation

Number of Views:43
Avg rating:3.0/5.0
Slides: 33
Provided by: nachiketk
Category:

less

Transcript and Presenter's Notes

Title: Instructor: Nachiket M' Kharalkar


1
Introduction to Microcontrollers
  • Instructor Nachiket M. Kharalkar
  •  
  • Lecture 7
  • Date 06/15/2007
  • E-mail knachike_at_ece.utexas.edu
  •  

2
Todays Agenda
  • Quiz 1 June 18th
  • Exam 1 June 25th
  • Get multimeter wire stripper
  • Page 2 instructions
  • Recap
  • Conditional branching
  • Logical operations
  • Shift operations
  • Friendly program
  • Stack

3
mul an 8-bit by 8-bit into 16-bit unsigned
multiply
  • The mul instruction takes two 8-bit inputs and
    generates a 16-bit product.
  • Condition code bits are set after RAB.
  • C R7, set if bit 7 of 16-bit result is one

4
idiv performs 16-bit by 16-bit unsigned divide
  • The idiv instruction takes two 16-bit inputs
    and generates a 16-bit quotient and a 16-bit
    remainder.
  • Condition code bits are set after
    quotientdividend/divisor.
  • Z result is zero,
  • V 0
  • C divide by zero,
  • Cnot(X15)not(X14)...not(X2)not(X1)not(X0)

5
fdiv performs a 16-bit by 16-bit unsigned divide
  • The fdiv instruction takes two 16-bit inputs
    and generates a 16-bit quotient and a 16-bit
    remainder.
  • Condition code bits are set after
    R(65536D)/X.
  • Z result is zero,
  • V overflow if RegX RegD, result gtFFFF
  • C divide by zero,

6
Multiply, divide instructions
  • emul YD YD unsigned multiply
  • emuls YD YD signed multiply
  • ediv Y YD/X unsigned divide (D Reminder)
  • edivs Y YD/X signed divide (D Reminder)

7
Signed branches, branch if
  • bge place greater than or equal to
  • if (NV)0
  • i.e., (NVNV)0
  • bgt place greater than
  • if (ZNV)0
  • i.e., (ZNVNV)0
  • ble place less than or equal to
  • if (ZNV)1
  • i.e., (ZNVNV)1
  • blt place less than
  • if (NV)1
  • i.e., (NVNV)1

8
Unsigned branches, branch if
  • bhs place greater than or equal to
  • if C0, same as bcc
  • bhi place greater than
  • if CZ0
  • blo place less than
  • if C1, same as bcs
  • bls place less than or equal to
  • if CZ1

9
  • It is important to know
  • precision (e.g., 8-bit, 16-bit)
  • format (e.g., unsigned, signed)
  • It takes three steps
  • read the first value into a register
  • compare the first value with the second value
  • conditional branch
  • When testing for equal or not equal
  • doesnt matter whether signed or unsigned
  • still matters if 8-bit or 16-bit
  • doesnt matter about load and compare order

10
8-bit if-then compare to zero examples
Assume G is an 8-bit global variable, signed or
unsigned
11
8-bit if-then signed compare to zero examples
Assume sG is a signed 8-bit global variable
12
8-bit if-then compare examples
Assume G1 G2 are 8-bit global variables, signed
or unsigned
13
Compare 8-bit versus 16-bit condition instructions
Assume G1 G2 are 8-bit global variables, signed
or unsigned Assume H1 H2 are 16-bit global
variables, signed or unsigned
14
Compare the four possible inequalities
Assume uG is an unsigned 8-bit global variable
15
for(uG0uGlt5uG) clr
uG loop  ldaa uG       cmpa 5       bhs  next  s
top when uGgt5      ????? body of while
loop inc uG       bra  loop next for(i
0ilt5i) // something 5 times ldaa 5
loop 5 down to 0 loop  ????? body of for
loop dbne A,loop
16
  • do
  • ?????
  • while(uG lt 5)
  • loop  ????? body of while loop
  • ldaa uG
  •       cmpa 5
  •       blo  loop  stop when uGgt5

17
Assembly directives supported by TExaS
18
  • Form double byte
  • (ltlabelgt) fdb ltexprgt(,ltexprgt,...,ltexprgt)
  • (ltlabelgt) dc.w ltexprgt(,ltexprgt,...,ltexprgt)
  • (ltlabelgt) dw ltexprgt(,ltexprgt,...,ltexprgt)
  • (ltlabelgt) .word ltexprgt(,ltexprgt,...,ltexprgt)
  • org FFFE
  • fdb main
  • Define 32-bit constant
  • (ltlabelgt) dc.l ltexprgt(,ltexprgt,...,ltexprgt)
  • (ltlabelgt) dl ltexprgt(,ltexprgt,...,ltexprgt)
  • (ltlabelgt) .long ltexprgt(,ltexprgt,...,ltexprgt)
  • S1  dl     100000,12345678
  • S2  .long  1,1000,1000000,1000000000
  • S3  dc.l   -1,0,1

19
Sample program
  • org 3800
  • size equ 5
  • data rmb size
  • org 4000
  • sum ldaa size
  • ldx data
  • clrb
  • loop addb 1,x
  • dbne A,loop
  • org FFFE
  • fdb sum

20
Logical operations
  • The N bit will be set is the result is negative.
  • The Z bit will be set if the result is zero.
  • Clear V0 bit.
  • anda w RegARegAw
  • anda U RegARegAU
  • andb w RegBRegBw
  • andb U RegBRegBU
  • bita w RegAw
  • bita U RegAU
  • bitb w RegBw
  • bitb U RegBU
  • coma RegAFF-RegA, RegARegA
  • comb RegBFF-RegB, RegBRegB
  • eora w RegARegA w
  • eora U RegARegA U
  • eorb w RegBRegB w
  • eorb U RegBRegB U
  • oraa w RegARegA w
  • oraa U RegARegA U

21
Friendly software
  • Set bit 2 of port T
  • ldaa 00000100
  • oraa PTT
  • staa PTT
  • Clear bit 5 of port AD
  • ldaa 11011111
  • anda PTAD
  • staa PTAD

22
Shift operations
  • The N bit is set if the result is negative.
  • The Z bit is set if the result is zero.
  • The V bit is set on a signed overflow, change in
    the sign bit.
  • The C bit is the carry out after the shift.
  • asla RegARegA2 (same as lsla)
  • aslb RegBRegB2 (same as lslb)
  • asld RegDRegD2 (same as lsld)
  • lsla RegARegA2 (same as asla)
  • lslb RegBRegB2 (same as aslb)
  • lsld RegDRegD2 (same as asld)
  • asra RegARegA/2 (signed)
  • asrb RegBRegB/2 (signed)
  • asrd RegDRegD/2 (signed)
  • lsra RegARegA/2 (unsigned)
  • lsrb RegBRegB/2 (unsigned)
  • lsrd RegDRegD/2 (unsigned)
  • rola RegArol(RegA) (C?A7??A0?C)
  • rolb RegBrol(RegB) (C?B7??B0?C)
  • rora RegAror(RegA) (C?A7??A0?C)

23
8-bit logical shift right
8-bit arithmetic shift right.
8-bit shift left
8-bit roll right and 8-bit roll left
24
Subroutines and the stack
  • classical definition of the stack
  • push saves data on the top of the stack,
  • pull removes data from the top of the stack
  • stack implements last in first out (LIFO)
    behavior
  • stack pointer (SP) points to top element
  • many uses of the stack
  • temporary calculations
  • subroutine (function) return addresses
  • subroutine (function) parameters
  • local variables

25
ldaa 1 psha
lds 4000
ldaa 2 psha
ldaa 3 psha
pulb
26
  • The push and pull instructions
  • psha push Register A on the stack
  • pshb push Register B on the stack
  • pshx push Register X on the stack
  • pshy push Register Y on the stack
  • des S S-1 (reserve space)
  • pula pull from stack into A
  • pulb pull from stack into B
  • pulx pull from stack into X
  • puly pull from stack into Y
  • ins SS1 (discard top of stack)
  • The following are important transfer instructions
  • tsx transfer S to X
  • tsy transfer S to Y
  • txs transfer X to S

27
We use the term subroutine all functions or
procedures
  • whether or not they return a value
  • develop modular software
  • called by either bsr or jsr
  • subroutine returns using rts

28
  • org 4000
  • main lds 4000 initialize stack
  • clra
  • loop bsr sub branch to subroutine
  • bra loop
  • Purpose increment a number
  • Input RegA, range 0 to 255
  • Output RegAInput1
  • Errors Will overflow if input is 255
  • sub inca adds one to Input
  • rts
  • org fffe
  • fdb main

29
Execution of the bsr instruction
  • Opcode fetch R 0x4004 0x07 from EEPROM
  • Operand fetch R 0x4005 0x02 from EEPROM
  • Stack store lsbW 0x3FFF 0x06 to RAM
  • Stack store msbW 0x3FFE 0x40 to RAM

30
The stack before and after execution of the bsr
instruction
31
Execution of the rts instruction
  • Opcode fetch R 0x4009 0x3D from EEPROM
  • Stack read msb R 0x3FFE 0x40 from RAM
  • Stack read lsb R 0x3FFF 0x06 from RAM

32
The stack before and after execution of the rts
instruction
Write a Comment
User Comments (0)
About PowerShow.com