Lecture 1: Hardware Platforms

1
Lecture 1 Hardware Platforms

• Anish Arora
• CIS788.11J
• Introduction to Wireless Sensor Networks
• Thanks to
• Hui Cao, Emre Ertin, Brian Dupaix

2
Outline

• Brief overview of hardware platform architecture
• Case study 1 XSM platform
• Case study 2 XSS (Stargate) platform
• Case study 3 eMote (Cortex M3) platform
• Readings
• The platforms enabling wireless sensor networks
• XSM SPOTS paper
• System architecture directions for networked
  sensors
• Next Century Challenges Mobile Networking for
  "Smart Dust"
• EGS and OPAL

3
Requirements

• Cost
• Lifetime (when almost always on, when almost
  always off)
• Performance
• Speed (in ops/sec, in ops/joule)
• Comms range (in m, in joules/bit/m)
• Memory (size, latency)
• Capable of concurrent operation
• Flexibility (?)
• Reliability, security, size, packaging

4
Types of sensor-actuator hardware platforms

• RFID equipped sensors
• Smart-dust tags
• typically act as data-collectors or trip-wires
• limited processing and communications
• Mote/Stargate-scale nodes
• more flexible processing and communications
• More powerful gateway nodes, potentially using
  wall power

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A Closer Look
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A Generic Sensor Network Architecture
PROCESSING SUB-SYSTEM
COMMUNICATION SUB-SYSTEM
SENSING SUB-SYSTEM
POWER MGMT. SUB-SYSTEM
ACTUATION SUB-SYSTEM
SECURITY SUB-SYSTEM
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Processing Subsystem

• Microcontroller
• von Neumann architecture (same address and data
  bus)
• typical 4 bit, 8 bit, 16 bit or 32 bit
  architectures
• speed 4 MHz-400MHz with 10-300 or more MIPS
• operate at various power levels
• fully active 1 to 50 mW
• sleep (memory standby, interrupts active, clocks
  active, cpu off)
• sleep (memory retained, interrupts active, clocks
  active, cpu off)
• sleep (memory retained, interrupts active, clocks
  off, cpu off) 5uW
• latency of wakeup is an issue
• fixed point or floating point operations
• multiple processors may be used (potentially on
  same core)
• could be DSP, FPGA

8
Processing Subsystem Memory

• Considerations Speed, capacity, price, power
  consumption, memory protection
• SRAM typical, 0.5KB-64MB
• Typical power consumption
• retained 100ua read/write 10ma if separate
  chip
• retained 2ua-100ua, read/write5ma if in core
• DRAM high power consumption in retained mode
• EEPROM4KB-512KB, often used as program store
• Flash 256KB-1GB or beyond
• Typical power consumption
• retained negligible read/write 7/20ma
• erase operation is expensive
• Large flashes are outside of core

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Processing Subsystem (contd.)

• Peripheral interfaces
• (for sensors, actuators, I/O, power)
• (whether analog and digital)
• (multiple busses with bridges between them)
• SPI Serial Peripheral Interface
• I2C
• UART Serial communication
• USB
• PCI
• Clocks
• Hardware Timers
• Dividers

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Processing Subsystem Peripherals

• Interrupts
• Asynchronous breaks in program execution
• Press of a button expiration of a timer
  completion of sensing data collection, of DMA
  transfer, of transmission event,
• When interrupt occurs, processor transitions to
  the corresponding interrupt handler to service
  interrupt and then resumes execution
• Can have multiple priority levels
• Interrupts are enabled and disabled through
  registers for each peripheral
• I/O Ports
• General Purpose Input Output pins (GPIO)

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Hardware Timers
Holds the value that initializes the timer at
startup
Holds value to compare against
Controls the mode (interval or one-shot) Starts
and stops the timer Enables/disables the
interrupts for this timer
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Clock Dividers
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Sensor Subsystem

• Multiple types of sensors may be used
• Environmental pressure, gas composition,
  humidity, light
• Motion or force accelerometers, rotation,
  microphone, piezoresistive strain, position
• Electromagnetic magnetometers, antenna, cameras
• Chemical/biochemical
• Digital or analog output
• MEMS enabling size, cost and power
  miniaturization nano coming
• Components
• Transducer
• Analog signal conditioning circuits
• Analog to digital conversion
• Digital signal processing

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Sensor Subsystem Considerations

• Energy consumption in active/passive mode is
  relevant
• Sampling rate (1Hz or lower to 5Khz or higher)
• Signal resolution
• ADC bits 8, 10, 12, 16, 20 bit (affects cost)
• On-chip or not
• Sensitivity, drift, offset
• Sensor calibration or reset frequency
• Interference, cross-talk

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Sensor Subsystem

• Wakeup circuits help reduce power consumption of
  processing
• But startup time/power cycling latencies become
  an issue (1ms-1000ms or higher)
• DMA of acquired sensor information is possible
• Connector requirements positive contact,
  flexibility, robustness

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Actuation Subsystem

• Types
• Leds, buzzers, motors, sliders, pumps, gears,
  solenoids
• Energy consumption (idle O(uW) active 1-40 mW)
  
• Startup time (1ms-1000ms or higher)
• Higher voltage planes and noise
• Coupling
• Opto-coupler for control
• communications, with
• encoders for feedback
• PWM drivers

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Power Management Subsystem

• Voltage regulator
• typical ranges 1.8V, 3.3V, 5V
• multiple voltages for various subsystem/power
  levels
• Gauges for voltage or current
• battery monitor (allows software to adapt
  computation)
• Control of subsystems wakeup/sleep
• latency is key in driving down the duty cycle
• Control of platform clock rate, processor voltage
• Run auxiliary hardware components from low speed
  oscillators (typically 32kHz)
• perform ADC conversions, DMA transfers, and bus
  operations while microcontroller core is stopped

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Power Management Subsystem

• Energy source
• volume energy density, mass energy density
• peak and average current (discharge rate)
• NiCd, NiMH, LiIon, LiPolymer, fuel cells
• DC-DC conversion
• Charger/energy harvesting/scavenging
• solar, wind, vibration, heat
• account for variations in supply
• number of charge/discharge cycles have limits
• Power supply may be external

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Communication Subsystem

• Considerations
• speed, range, power consumption, startup time
• energy efficiency joules/bit/m
• signal propagation and interference
  characteristics
• difference between receive power versus transmit
  power
• not all devices need a receiver
• choice of power level
• antenna design
• matching impedance

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Communication Subsystem
Idle current
Startup time
Energy per bit
Technology Data Rate Tx Current Energy per bit Idle Current Startup time
CC1000 76.8 Kbps 10 mA 430 nJ/bit 7 mA Low
Bluetooth 1 Mbps 45 mA 149 nJ/bit 22 mA Medium
802.11 11 Mbps 300 mA 90 nJ/bit 160 mA High
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Communication Subsystem (contd.)
2.5 ms
1 10 ms typical
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Security Subsystem
Some COTS radios offer security features
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II. XSM node platform

• Derived from Mica2 mote
• Better sensor actuator range
• 4 Passive Infrared 25m for SUV
• Sounder 10m
• Microphone 50m for ATV
• Magnetometer 7m for SUV
• Better radio range 30m
• Other features
• Grenade timer
• Wakeup circuits (Mic, PIR)
• Adjustable frequency sounder
• Integrated Mag Set/Reset

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XSM Processing Sub-System

• Inherited from Mica2
• Atmel AVR ATMEGA128L
• RISC Architecture
• 8 bit ALU/data-path
• 128 KB FLASH Code
• 4 KB SRAM Data
• 512 Kb FLASH Storage
• Peripherals
• Clocks 7.37 MHz, 32KHz
• UART 2400 bps to 115 kbps
• SPI up to 1 Mbps
• I2C up to 400 kbps, EEPROM, IO extenders, ADC
  converters, sensors, etc
• Timer
• Two 8-bit timers
• Two 16-bit timers
• Interrupts
• LED 3 (green, yellow, red)

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XSM Sensing Sub-System on Board

• Passive infrared
• Long range (15m)
• Low power (10s of uW), 1s startup latency
• Wide FOV (360 degrees with 4 sensors)
• Gain 80dB
• Hardware wakeup detector on-board
• Microphone
• LPF fc 100Hz 10kHz
• HPF fc 20Hz 4.7kHz
• Gain 40dB 80dB (100-8300)
• Hardware wakeup detector on-board
• Magnetometer
• High power, .41ms startup latency
• Gain 86dB (20,000)
• Photo and Temperature
• Accuracy 0.01oC

10 bit ADC
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XSM Acoustics Sensing
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XSM Communication Sub-System

• Inherited from Mica2
• ChipCon CC1000
• No buffering (!)
• Range 100s of feet
• Frequency selectable from 300-1000 MHz, but board
  set to operate in 433 MHz band
• FSK modulation w/ data rates 38.4 kbps, up to
  76.8 kbps
• Hardware based Manchester encoding
• Integrated bit synchronizer

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XSM Radio Performance
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XSM Power Management

• Low-power operation 15 mW _at_ 4 MHz
• Multiple sleep modes
• Idle Mode 6 mW
• CPU OFF, all peripherals ON
• CPU woken up by interrupts
• Power Down Mode 75 uW
• CPU and most peripherals OFF
• External Interrupts, 2 Wire Interface, Watchdog
  ON
• Power Save Mode 120 uW
• Similar to Power Down
• Timer0 continues to run asynchronously

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XSM Reliability through the Grenade Timer

• Once started
• You cant turn it off
• You can only speed it up
• Implementation

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III. XSS (Stargate) Node Platform
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Stargate
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Stargate Architecture
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XSS Processing Sub-system

• PXA255 processor based on XScale
  microarchitecture
• Successor to StrongARM family
• Variable clock (100 - 400 MHz), less than 500 mW
  power
• 64MB RAM, 32M Flash

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XSS Communication Subsystem
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XSS Communication Subsystem

• Bluetooth
• 2.4 GHz band, FHSS, Master-Slave arch., 0 to 20
  dBM
• Connection oriented 3 seconds to form
  connection
• Remote wakeup feature available
• Event driven power management
• 802.11
• PCMCIA or Compact Flash slot available
• Enables interaction with the Internet
• Several wireless manipulation tools available
• Wireless extensions API
• HostAP driver
• Enables a Stargate to act as an access point

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XSS Mote interface

• 51 pin mote connector
• Talks to mote over the UART
• Other GPIO lines connected to mote
• Enables Stargate to act as a sensor network
  gateway

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XSS Power Management Subsystem
Power gating provided for Bluetooth and 802.11
radios Overcomes inefficiencies in shutdown
modes of the radios Decreases shutdown mode
power of 802.11 card from 250mW to 1mW
Increases wakeup latency since radio needs to be
powered up first Gas gauge permits measurement
of battery voltage and current Enables battery
state aware energy management
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XSS Power Management Subsystem (cont.)
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Recent 802.15.4 Platforms

• Focused on low power
• Sleep - Majority of the time
• Telos 2.4mA
• MicaZ 30mA
• Wakeup
• Telos 290ns typical, 6ms max
• MicaZ 60ms max internal oscillator, 4ms external
• Process
• Telos 4MHz 16-bit
• MicaZ 8MHz 8-bit
• TI MSP430
• Ultra low power
• 1.6mA sleep
• 460mA active

• Standards Based
• IEEE 802.15.4, USB
• IEEE 802.15.4
• CC2420 radio
• 250kbps
• 2.4GHz ISM band
• Ease of development and Test
• Program over USB
• Std connector header

UCB Telos
Xbow MicaZ
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Telos rev B, aka TelosB

• Standards Based
• USB
• IEEE 802.15.4
• CC2420, 250kbps at 2.4GHz
• Features
• TI MSP430
• 10kB RAM, 4Mhz 16-bit RISC, 48K Flash
• 12-bit ADC and DAC (200ksamples/sec)
• DMA transfers while CPU off
• Integrated antenna
• Standard IDC connectors

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Front of mote
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Back of mote
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Processing subsystem block diagram
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Block diagram
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TelosB Power Consumption
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eMote

• Support for wide range of application demands
• Flexible, low-power operation
• Multiple operating modes with short switching
  time
• Flexible software environment, supporting .Net MF

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Programming Support

• Applications in managed code written in C
• Can create OS extensions in C for ultra high
  efficiency
• Can use the standard tools for the MF
• Library support for WSN applications
• Low power MAC
• Signal processing libraries
• Dynamic application reconfiguration

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eMote Processor and MF extensions

• Like Opal and Egs, in its selection of Cortex M3
• 1 cycle 32 bit adds 2 cycle 32 bit multiplies
  (with 64 bit result).
• 12 Channel Direct Memory Access (DMA), for fast
  ultra efficient block transfers without the CPU
• Precise control of the timing of events (i.e., µs
  accuracy)
• Precise interrupt control (less than µs jitter)
• Extensive ADC/DAC support

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Efficiency

• Efficient processing over wide operating range
• Normal mode 8 MHz at 16.3 mW (at battery)
• High Performance Mode 60 MHz at 67 mW
• Rest Mode 820 µW with near instant wakeup and
  sleep
• Sleep Mode 200 µW in beta unit (dropping to 30
  µW in future versions) with 50 µs wakeup and
  sleep
• Off Mode Retains Real Time Clock (RTC) for 20
  years without the main battery
• Efficient power management
• 90 efficiency across all run modes
• 50 efficiency in sleep mode
• Separate regulator for flash, MicroSD card, and
  USB.
• Works across a wide range of batteries, from 0.7
  to 2.0 V
• Can fully deplete most batteries capturing all
  available energy

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Microcontroller

• Microcontroller
• 32-bit ARM Cortex-M3 from STM
• 8MHz normal operating speed
• Capable of up to 64Mhz operation
• Single cycle multiplication and hardware division
  support

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Memory

• 96 KByte on chip SRAM
• 1 MByte on chip Flash
• 8 MByte off chip Flash--Can support up to 256MB,
  cost is constraining factor
• Off chip memory on main memory bus only modest
  loss
• of efficiency associated with off-chip
  memories
• Can eXecute in Place (XIP) from external Flash
• SDIO memory capability

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Radio

• On-board radio
• Atmel AT86RF230 radio
• 2.4GHz transceiver
• IEEE 802.15.4, ZigBee and 6LoWPAN compliant

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External Peripheral Interfaces

• USB
• Slave and Host mode
• SPI
• Dedicated SPI controller for system devices
  (radio)
• Shared SPI controller with up to 3 chip selects
  for external devices
• I2C
• ADC
• Up to 8 analog input channels
• DAC
• Up to 2 independent channels
• SDIO card (optional)
• Several general purpose IO lines
• Standard headers for easy interconnects

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ADC and DAC

• Impedance Buffered ADC
• Full scale selectable at 5.0 V, 3.0 V, or 1.8 V
• Up to 200 KHz
• Low power
• 8-bit or 12-bit Digital to Analog (DAC)
  conversion, shared with GPIO

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Power

• Low operating voltage of 2V
• Highly flexible, low power operation modes
• Normal mode 20mW
• 8MHz operating frequency with prefetch enabled
• Suitable for IO intensive application scenarios
• Low power Normal mode 2mW
• 8MHz operating frequency with prefetch disabled
• Same performance as Normal mode for arithmetic
• Suitable for compute-intensive, inner-loop math
  operations
• About 3x slower for memory operations
• Sleep mode 800uW

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Power (contd.)

• Low switching overhead between any of these 3
  modes
• Cost of a single function call
• Additional power modes supported
• Fast mode 70mW
• 64MHz operating frequency with prefetch enabled
• Deep sleep mode 28uW
• Higher switching latency from previous 3 modes
• About 1ms for fast oscillator stabilization or
  wakeup from deep sleep
• Flexible eMote power management design for
  efficiency
• Low power modes for normal operation
• Can run faster if needed, but at higher power
• May save overall power e.g. if peripherals need
  to be ON during long computations shorter,
  high-power operations yield more efficiency

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Popular Nodes Overview
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Manufacturers of Sensor Nodes

• Intel Research
• Stargate2, iMote, psiMote
• Crossbow (www.xbow.com)
• Mica2 mote, Micaz, Dot mote and Stargate Platform
• Sentilla (www.sentilla.com) prev. Moteiv
  (www.moteiv.com)
• Ember (www.ember.com)
• Integrated IEEE 802.15.4 stack and radio on a
  single chip
• Millenial Net (www.millenial.com)
• iBean sensor nodes
• Dust Inc
• Smart Dust
• Cogent Computer (www.cogcomp.com)
• XYZ Node (CSB502) in collaboration with
  ENALAB_at_Yale
• Sensoria Corporation (www.sensoria.com)
• WINS NG Nodes

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Units to keep in mind

• Energy
• (work done when force of 1 newton moves the point
  of its application a distance of 1 meter in
  direction of force) Joules
• (electricity) milli Watt hours 1mWhr 3.6J
• (thermal) Calories 1cal4.1868J
• Power
• (rate of energy conversion) milli Watts
• 1W when one ampere flows through a potential
  difference of one volt
• Charge
• milli Ampere hours

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References

• TMote DataSheet (www.moteiv.com)
• Atmel ATMEGA128L DataSheet (www.atmel.com)
• ChipCon CC1000 DataSheet (www.chipcon.com)
• RFM TR1000 DataSheet (www.rfm.com)
• XBow Corp. (www.xbow.com)
• J. Hill et.al., A wireless embedded sensor
  architecture for system-level optimization, ISCA
• J.Polastre et.al.,Wireless Sensor Networks for
  Habitat Monitoring, WSNA02
• J.Polastre et.al., The Mote Revolution Low
  Power WSN Devices
• TinyOS Web (http//www.tinyos.net)
• Andreas Savvides (http//www.eng.yale.edu/enalab/c
  ourses/eeng460a)
• Vijay Raghunathan (http//nesl.ee.ucla.edu/courses
  /ee202a/2003f/lectures/GP03_Vijay.ppt)