Nantes Status 2001

1
Nantes Status 2001
April 2001 - August 2001 2 students (3 months
stage, 2 months vacations) gt J2 backplane
Version1 few error, good gt Regional board
Version 0 cabling error,bad September 2001 -
february 2002 gt nothing
2
Nantes dimuons trigger conception
gt J2 backplane (J2-B) validation march 2003 gt
regional board (R-B) validation march 2003 gtdaq
board (D-B) validation august 2004
16 (J2-B) 16 (R-B) 1 (D-B)
3
Regional trigger board
Local board
Local board
Local board
Local board
gtFPGA configuration gtRun control interface gtVME
interface gtTrigger calcul gtDAQ interface
DAQ
Local board
Local board
Local board
Regional board
Global trigger
J1(VME) J2 J3
Run control
FPGA config
4
Regional board - preliminary testssept 2002 -
oct 2002
Regional board
FPGA configuration local crate PC Jtag Altera
interface maxplus2 software
altera
PC for test
5
Regional board - preliminary testssept 2002 -
oct 2002
Regional board
Run control interface local crate FPGA config
(PCJTAGalteramaxplus2) JTAG specific
link LabVIEW development
JTAG run control
altera
PC for test
6
Regional board - preliminary testssept 2002 -
oct 2002
Oscillopattern
Regional board
VME interface local crate FPGA config
(PCJTAGalteramaxplus2) Run control
interface (JTAGLabVIEW) pattern
generator digital oscilloscope
J1(VME) J2
altera
PC for test
7
Regional board - preliminary testssept 2002 -
oct 2002
Global trigger (oscillo)
pattern
Regional board
TRIGGER calcul local crate FPGA config
(PCJTAGalteramaxplus2) Run control interface
(JTAGLabVIEW) pattern generator digital
oscilloscope
J2
altera
PC for test
8
Regional board - preliminary testssept 2002 -
oct 2002
Analyzer
DAQ interface local crate FPGA config
(PCJTAGalteramaxplus2) Run control interface
(JTAGLabVIEW) pattern generator frequency
generator multi-channel digital analyzer
DAQ
pattern
Regional board
Global trigger
J1(VME) J2
altera
PC for test
9
Regional board - Clermont testsnov 2002 - jan
2002
Local board
Local board
VME bit pattern
DAQ
Local board
Regional board
VME Daq V533
Global trigger
J1(VME) J2 J3
altera
Nantes PC for test
Run control translation
Clermont software (VME control)
10
Nantes trigger electronic planning 2002
March 2002 - Jul 2002 Regional board conception
1 AI (50) - 1 Ing (20) Sept 2002 - oct
2002 Regional board preliminary test 1 Ing
(40) Nov 2002 - jan 2002 Regional board
validation test in Clermont 1 ing
(travel1week/month) J2 backplane version
2 1 AI (50) - 1 Ing (10)
11
Nantes trigger electronic futur planning
March 2003 - end 2003 gt Regional board
conception version2 1 AI (50), 1 Ing (20)
gt DAQ board version 1 1AI (30), 1
Ing (30) gt Na bench test definition 2004
gt DAQ board test