CGS 3269 COMPUTER SYSTEMS ARCHITECTURE Course Website: http://www.cs.ucf.edu/courses/cgs3269.spr2002 - PowerPoint PPT Presentation

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CGS 3269 COMPUTER SYSTEMS ARCHITECTURE Course Website: http://www.cs.ucf.edu/courses/cgs3269.spr2002

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DESKTOPS/SERVERS/LAPTOPS (WINDOWS/LINUX BASED) INTEL, AMD. DESKTOPS/LAPTOPS (MACINTOSH) ... SPARC. CUSTOM PROCESSORS FOR MOBILE, EMBEDDED, LOW POWER APPLICATIONS ... – PowerPoint PPT presentation

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Title: CGS 3269 COMPUTER SYSTEMS ARCHITECTURE Course Website: http://www.cs.ucf.edu/courses/cgs3269.spr2002


1
CGS 3269COMPUTER SYSTEMS ARCHITECTURECourse
Website http//www.cs.ucf.edu/courses/cgs3269.spr
2002
2
COMPUTER ORGANIZATION
  • DIFFERENCE IN PERCEPTION BETWEEN MAN AND MACHINE.
    HOW DO YOU MAP PROBLEM SPACE TO MACHINE
    SPACE?
  • TWO DIFFERENT APPROACHES EXIST
  • TRANSLATION
  • INTERPRETATION

3
COMPUTER ORGANIZATION
  • TRANSLATION USER WRITES A PROGRAM, WHICH IS THEN
    TRANSLATED BY MACHINE INTO A MACHINE-FRIENDLY
    PROGRAM AND EXECUTED.
  • INTERPRETATION MACHINE INTERPRETS EACH
    INSTRUCTION INDIVIDUALLY. THIS TECHNIQUE DOES NOT
    REQUIRE GENERATION OF A MACHINE-FRIENDLY
    PROGRAM INSTEAD MACHINE-FRIENDLY
    INSTRUCTION(S) ARE GENERATED

4
COMPUTER ABSTRACTION
5
  • LEVEL 0 DIGITAL LOGIC LEVEL
  • GATES DIGITAL DEVICES (AND, OR) MODELED FROM
    ANALOG COMPONENTS (TRANSISTORS)
  • GATES MODEL 1BIT MEMORY (CAN STORE 0 OR 1) AND
    ALU (DISCUSSED LATER)
  • REGISTERS ARE MODELED FROM 4, 8, 16, 32 BIT MEMORY

6
  • LEVEL 1 MICROARCHITECTURE LEVEL
  • LOCAL MEMORY IS FORMED FROM COLLECTION OF
    REGISTERS (TYPICALLY 8 TO 32 DEPENDING ON
    ARCHITECTURE)
  • GATES FORM ALU (ARITHMETIC LOGIC UNIT) CAPABLE
    OF ARITHMETIC OPERATIONS
  • REGISTERS ARE CONNECTED TO THE ALU TO FORM THE
    DATA PATH, OVER WHICH THE DATA FLOWS
  • DATA PATH OPERATION IS TO TAKE DATA FROM ONE OR
    MORE REGISTERS TO THE ALU, WHERE IT IS PROCESSED
    AND RETURN RESULT TO REGISTER(S)

7
MICROPROGRAM
  • CONTROLS OPERATION OF THE DATA PATH
  • OR
  • DATA PATH CONTROL
  • CAN BE HARDWARE BASED

8
LEVEL 2 INSTRUCTION SET ARCHITECTURE LEVEL
  • MACHINES INSTRUCTION SET
  • INSTRUCTIONS CARRIED OUT INTERPRETIVELY BY THE
    MICROPROGRAM OR HARDWARE

9
  • LEVEL 3 OPERATING SYSTEM MACHINE LEVEL
  • LEVEL 4 ASSEMBLY LANGUAGE LEVEL (NOTE THE SHIFT
    FROM INTREPRETATION TO TRANSLATION)
  • LEVEL 5 PROBLEM-ORIENTED LANGUAGE LEVEL

10
HISTORY OF COMPUTING
  • ZEROTH GENERATION MECHANICAL COMPUTERS
  • FIRST GENERATION VACUUM TUBES
  • SECOND GENERATION TRANSISTORS
  • THIRD GENERATION INTEGRATED CIRCUITS

11
HISTORY OF COMPUTING
  • FOURTH GENERATION VLSI
  • FUTURE TRENDS (QUANTUM COMPUTING?)

12
COMPUTER FAMILIES
  • DESKTOPS/SERVERS/LAPTOPS (WINDOWS/LINUX BASED)
  • INTEL, AMD
  • DESKTOPS/LAPTOPS (MACINTOSH)
  • MOTOROLA

13
COMPUTER FAMILIES
  • WORKSTATIONS/SERVERS (SUN OS, SOLARIS BASED)
  • SPARC
  • CUSTOM PROCESSORS FOR MOBILE, EMBEDDED, LOW POWER
    APPLICATIONS

14
COMPONENTS OF PC ARCHITECTURE
  • CPU
  • MEMORY
  • INPUT/OUTPUT
  • DISK STORAGE
  • PROGRAMS

15
NUMBER SYSTEMS
  • BINARY
  • OCTAL
  • DECIMAL
  • HEXADECIMAL
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