Computer Architecture CPSC 321

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Computer ArchitectureCPSC 321

• E. J. Kim

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Overview

• Logical Instructions
• Shifts

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Bitwise Operations

• Up until now, weve done arithmetic (add,
  sub,addi ), memory access (lw and sw), and
  branches and jumps.
• All of these instructions view contents of
  register as a single quantity (such as a signed
  or unsigned integer)
• New Perspective View contents of register as 32
  bits rather than as a single 32-bit number
• Since registers are composed of 32 bits, we may
  want to access individual bits (or groups of
  bits) rather than the whole.
• Introduce two new classes of instructions
• Logical Operators
• Shift Instructions

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Logical Operators

• Two basic logical operators
• AND outputs 1 only if both inputs are 1
• OR outputs 1 if at least one input is 1

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Logical Operators

• Two basic logical operators
• AND outputs 1 only if both inputs are 1
• OR outputs 1 if at least one input is 1

• Truth Table standard table listing all possible
  combinations of inputs and resultant output for
  each
• Truth Table for AND and OR
• A B AND OR
• 0 0
• 0 1
• 1 0
• 1 1

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Logical Operators

• Instruction Names
• and, or Both of these expect the third argument
  to be a register
• andi, ori Both of these expect the third
  argument to be an immediate
• MIPS Logical Operators are all bitwise, meaning
  that bit 0 of the output is produced by the
  respective bit 0s of the inputs, bit 1 by the
  bit 1s, etc.

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Uses for Logical Operators

• Note that ANDing a bit with 0 produces a 0 at the
  output while ANDing a bit with 1 produces the
  original bit.
• This can be used to create a mask.
• Example
• 1011 0110 1010 0100 0011 1101 1001 1010
• 0000 0000 0000 0000 0000 1111 1111 1111
• The result of ANDing these two is
• 0000 0000 0000 0000 0000 1101 1001 1010
• The second bit string in the example is called a
  mask. It is used to isolate the rightmost 12 bits
  of the first bit string by masking out the rest
  of the string (e.g. setting it to all 0s).

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Uses for Logical Operators

• Thus, the and operator can be used to set certain
  portions of a bit string to 0s, while leaving the
  rest alone.
• In particular, if the first bitstring in the
  above example were in t0, then the following
  instruction would mask it
• andi t0,t0,0xFFF
• Similarly, note that ORing a bit with 1 produces
  a 1 at the output while ORing a bit with 0
  produces the original bit.
• This can be used to force certain bits of a
  string to 1s.
• For example, if t0 contains 0x12345678, then
  after this instruction
• ori t0, t0, 0xFFFF
• t0 contains 0x1234FFFF (e.g. the high-order 16
  bits are untouched, while the low-order 16 bits
  are forced to 1s).

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Shift Instructions (1/3)

• Move (shift) all the bits in a word to the left
  or right by a number of bits.
• Example shift right by 8 bits
• 0001 0010 0011 0100 0101 0110 0111 1000

• 0000 0000 0001 0010 0011 0100 0101 0110
• Example shift left by 8 bits
• 0001 0010 0011 0100 0101 0110 0111 1000

0011 0100 0101 0110 0111 1000 0000 0000
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Shift Instructions (2/3)
MIPS shift instructions 1. sll (shift left
logical) shifts left and fills emptied bits with
0s 2. srl (shift right logical) shifts right and
fills emptied bits with 0s 3. sra (shift right
arithmetic) shifts right and fills emptied bits
by sign extending

• Shift Instruction Syntax
• 1 2,3,4
• where
• 1) operation name
• 2) register that will receive value
• 3) first operand (register)
• 4) shift amount (constant lt 32)

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Shift Instructions (3/3)

• Example shift right arith (sra) by 8 bits
• 0001 0010 0011 0100 0101 0110 0111 1000

• 0000 0000 0001 0010 0011 0100 0101 0110
• Example shift right arith (sra) by 8 bits
• 1001 0010 0011 0100 0101 0110 0111 1000

1111 1111 1001 0010 0011 0100 0101 0110
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Uses for Shift Instructions (1/4)

• Suppose we want to isolate byte 0 (rightmost 8
  bits) of a word in t0. Simply use
• andi t0,t0,0xFF
• Suppose we want to isolate byte 1 (bit 15 to
  bit 8) of a word in t0. We can use
• andi t0,t0,0xFF00
• but then we still need to shift to the right by 8
  bits...

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Uses for Shift Instructions (2/4)

• Could use instead
• sll t0,t0,16
• srl t0,t0,24
• t0
• 0001 0010 0011 0100 0101 0110 0111 1000

After sll 0101 0110 0111 1000 0000 0000 0000 0000
After srl 0000 0000 0000 0000 0000 0000 0101 0110
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Uses for Shift Instructions (3/4)

• In binary
• Multiplying by 2 is same as shifting left by 1
• 112 x 102 1102
• 10102 x 102 101002
• Multiplying by 4 is same as shifting left by 2
• 112 x 1002 11002
• 10102 x 1002 1010002
• Multiplying by 2n is same as shifting left by n

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Uses for Shift Instructions (4/4)

• Since shifting maybe faster than multiplication,
  a good compiler usually notices when C code
  multiplies by a power of 2 and compiles it to a
  shift instruction
• a 8 (in C)
• would compile to
• sll s0,s0,3 (in MIPS)
• Likewise, shift right to divide by powers of 2
• remember to use sra

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The Story so far

• We introduced numerous MIPS assembly language
  instructions.
• We are now familiar with registers and register
  usage conventions.
• We know how to use system calls, basic I/O
• We have learned how the stack works
• What is missing?

Practice! Practice! Practice!
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What Next?

• We need a more detailed knowledge about the
  instruction formats to fully appreciate certain
  restrictions.
• The functional interface is easy to understand,
  since it is basically familiar procedural
  programming
• We need to understand how the computer interprets
  the instruction, so that we can transition to the
  discussion of the MIPS hardware architecture

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Machine Language
What does that mean?

• Machine language level programming means that we
  have to provide the bit encodings for the
  instructions
• For example, add t0, s1, s2 represents the
  32bit string
• 00000010001100100100000000100000
• Assembly language mnemonics usually translate
  into one instruction
• We also have pseudo-instructions that translate
  into several instructions

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Instruction Word Formats

• Register format
• Immediate format
• Jump format

op-code rs rt
rd shamt funct
6 5 5 5 5
6
op-code rs rt
immediate value
6 5 5 16
op-code 26 bit current
segment address
6 26
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Register Format (R-Format)

• Register format
• op basic operation of instruction
• funct variant of instruction
• rs first register source operand
• rt second register source operand
• rd register destination operand
• shamt shift amount

op-code rs rt
rd shamt funct
6 5 5 5 5
6
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Watson, the case is clear

• add t0, s1, s2
• 00000010001100100100000000100000
• 000000 10001 10010 01000 00000 100000
• Operation and function field tell the computer to
  perform an addition
• 000000 10001 10010 01000 00000 100000
• registers 17, 18 and 8

op-code rs rt
rd shamt funct
6 5 5 5 5
6
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Number
Name
Value
Registers
0 zero
1 at
2 v0
3 v1
4 a0
5 a1
6 a2
7 a3
8 t0
9 t1
10 t2
11 t3
12 t4
13 t5
14 t6
15 t7
16 s0
17 s1
18 s2
19 s3
20 s4
21 s5
22 s6
23 s7
24 t8
return values from functions
pass parameters to functions
t0-t7 are caller saved registers use these
registers in functions
s0-s7 are callee-saved registers use
these registers for values that must be
maintained across function calls.
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Watson, the case is clear

• add t0, s1, s2
• 00000010001100100100000000100000
• 000000 10001 10010 01000 00000 100000
• source registers s117 and s218 and target
  register t08

op-code rs rt
rd shamt funct
6 5 5 5 5
6
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R-Format Example

• Register format
• (op, funct)(0,32) add
• rs17 first source operand is s1
• rt18 second source operand is s2
• Rd8 register destination is t0
• add t0, s1, s2

0 17 18
8 0 32
6 5 5 5 5 6
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Immediate Format (I-Format)

• Immediate format
• op determines the instruction (op ltgt 0)
• rs is the source register
• rt is the destination register
• 16bit immediate value

op rs rt
immediate value
6 5 5 16
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I-Format Example

• Immediate format
• op8 means addi
• rs29 means source register is sp
• rt29 means sp is destination register
• immediate value 4
• addi sp, sp, 4

8 29 29
4
6 5 5 16
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Problem

• The MIPS assembly language has the command andi,
  an immediate bit-wise and operation
• We can say li s0, 0xCDEF1234 to load register
  s0 with the content 0xCDEF1234
• Why is this strange?
• In the immediate format, you can only load 16
  bits, but the constant is 32 bits!

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Pseudo-Instructions

• li s0, 0xCDEF1234 is a pseudo-instruction
• It is a convenient shorthand for
• lui at, 0xCDEF
• ori s0, at, 0x1234
• The register at is used here by the assembler
  this is the reason why you should not use this
  register.

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Puzzle

• How can we swap the content of two registers, say
  s0 and s1, without accessing other registers or
  memory?
• Solution
• xor s0, s0, s1
• xor s1, s0, s1
• xor s0, s0, s1

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MIPS Addressing Modes

• Immediate addressing
• Register addressing
• Base displacement addressing
• PC-relative addressing
• address is the sum of the PC and a constant in
  the instruction
• Pseudo-direct addressing
• jump address is 26bits of instruction
  concatenated with upper bits of PC

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Addressing Modes

• Register Addressing
• add s1, s2, s3
• s1 s2 s3
• Immediate Addressing
• addi s1, s2, 100
• s1 s2 100

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Addressing Modes

• Base addressing
• lw s1, 100(s2)
• s1 Memorys2100
• PC-relative branch
• beq s1, s2, 25
• if (s1 s2) goto PC 4 100

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Addressing Modes

• Pseudo-direct addressing
• j 1000
• goto 1000
• concatenate 26bit address with upper bits of the
  PC