ELEC5970-003/6970-003/Fall%202004%20Advanced%20Topics%20in%20Electrical%20Engineering%20Designing%20VLSI%20for%20Low-Power%20and%20Self-Test%20Class%20Projects%20and%20Presentations

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ELEC5970-003/6970-003/Fall 2004Advanced Topics
in Electrical EngineeringDesigning VLSI for
Low-Power and Self-TestClass Projects and
Presentations

• Vishwani D. Agrawal
• James J. Danaher Professor
• Department of Electrical and Computer Engineering
• Auburn University
• http//www.eng.auburn.edu/vagrawal
• vagrawal_at_eng.auburn.edu

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Student Evalulation

• Homework (30) three
• Student presentation (10)
• Research paper (30-60) a publishable paper
  will exempt the student from the final exam
• Final Exam (0-30)

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Project 1 Mixed-Signal BIST

• Select an analog function in a mixed-signal
  environment.
• Develop a specification-based test procedure.
• Design a digital TPG and an ORA with measurable
  output.
• Analyze ORA for tolerance characteristic and
  aliasing.

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Mixed-Signal BIST Stroud, Dai

• Digital circuitry tests analog circuitry
• Minimum overhead impact to analog circuitry
• Capable of automatic measurement gain, linearity
• Developed parameterized HDL models
• Automatic synthesis in any mixed-signal system

Digital Circuitry
Analog Circuitry
System
Function
DAC
101011000111011010
101011000111011010
System
ADC
Function
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Reference

• F. Dai, C. Stroud, D. Yang and S. Qi, Automatic
  Linearity (IP3) Test with Built-In Pattern
  Generator and Analyzer, Proc. International Test
  Conference, October 2004.
• M. Burns and G. W. Roberts, An Introduction to
  Mixed-Signal IC Test and Measurement, New York
  Oxford University Press, 2001.

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Project 2 Spectral BIST

• Develop TPG and ORA circuits for testing of
  digital circuits.
• Analyze overhead, coverage and aliasing.

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Spectral Testing

• Main ideas
• Meaningful inputs (e.g., test vectors) of a
  circuit are not random.
• Input signals have spectral characteristics that
  are different from white noise (random vectors).

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Statistics of Test Vectors
100 coverage Tests
a
a 00011 b 01100 c 10101
b
c

• Test vectors are not random
• Correlation a b frequently used.
• Weighting c has more 1s than a or b.

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Spectral Test Generation
Initial vectors (random)
Fault coverage ?
Fault simulation and vector- compaction
Stop
ok
low
Compute spectral coefficients
Add filtered vectors to test set
(Hadamard Functions)
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Spectral Test Results
Spectral ATPG Det vec CPU s 3643 734
44 1645 4464 24
Strategate Det vec CPU s 3639 11571
2268 1488 33113 9659
HITEC Det vec CPU s 3231 912 1104 - -
-
Circuit name s5378 b12
CPU Ultra Sparc 10 HITEC Nierman and Patel,
EDAC91 Strategate Hsiao et al., ACMTDAES00
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Reference

• A. Giani, S. Sheng, M. S. Hsiao, and V. D.
  Agrawal, Novel Spectral Methods for Built-In
  Self-Test in a System-on-a-Chip Environment,
  Proc. 19th IEEE VLSI Test Symp., 2001, pp.
  163-168.

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Project 3 Low-Power Adiabatic Logic

• Basic Idea If we charge a capacitor C to
  voltage V in n equal increments, then the energy
  required by each increment is
• C(V/n)2 (1/n2) CV2
• The total energy of n-step charging is 1/n of
  that required to charge the capacitor to the full
  voltage V in one step.

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Adiabatic CMOS Circuits

• Low-Power circuits have been designed with
  time-varying (periodic) power supply.
• The objective is to analyze
• Effect of the shape (sinusoidal, triangular,
  etc.) of the power supply waveform on power
  dissipation.
• Effect of the supply frequency on delay and power
  of the circuit.
• Possibly treat supply as AC instead of DC.

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Related Ideas for Investigation

• Energy recovery
• Reversible Logic

VDD
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Reference

• Y. Ye and K. Roy, QSERL Quasi-Static Energy
  Recovery Logic, IEEE J. Solid State Circuits,
  vol. 36, no. 2, pp. 239-248, Feb. 2001.

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Project 4 Submicron Leakage Power Reduction

• Recent references.

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Project 5 ISA for Low Power

• Recent references.

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Project 6 Power Estimation Algorithms

• Mixed-levels of hierarchy
• Glitch, leakage and short-circuit power
• Recent references