To write any register, we need register address and a write signal

1
Register file design review

• To write any register, we need register address
  and a write signal
• A 3-bit write address is decoded if write signal
  is present
• One of the eight registers gets a LD signal from
  decoder

2
An eight function ALU design review

• ALU operation code and their meanings are
• 000 Output A 100 A B
• 001 Output B 101 A - B
• 010 Output 00..0 110 A and B
• 011 Output 11..1 111 A or B
• Three bits are Sel2, Sel1, and Sel0
• Sel0 makes first set of groups
• Selects one of the two functions
• Sel2 and Sel1 selects final output
• It is one of the four groups

3
Shifter unit review

• A general-purpose shift unit controls load input
  of the register
• Shift operation is controlled by two bits SC (s1
  s0) as follows
• 00 No change in register 10 Shift left
• 01 Load new data 11 Shift right
• Thus a flip flop at position i gets its own value
  Qi, a new external value Di, a value on its right
  Qi-1, or a value on its left Qi1
• A 4-to-1 multiplexer at the input of each flip
  flop is thus needed
• For non-registered data shift unit we only need
  multiplexers

4
Memory unit

• A general-purpose memory has M words
• M is generally a power of 2 (like 2, 4, 8, ,
  1024, .., 2m)
• Each word is n-bit wide
• An m-bit address specifies which word is to be
  written or read
• A read and a write signal control read and write
  operations
• Some memories are read only (ROM), they are
  written once or more times using various
  mechanisms
• A read/write memory using any address is called
  RAM

5
A bus structure review

• There are more than one source of data on a set
  of wire (bus)
• We have enable signals to decide who will write
  on bus
• The data from bus can be written into more than
  one units
• Data are n-bit wide, n depends on data bus width
• The value of k depends on number of sources
• Only one source should be enabled on bus
• We need multiplexing, typically achieved by
  tri-state buffers
• An example bus is shown below

6
Now we are ready to write control

• Using the data path design, we can carry out
  meaningful ops
• Add two registers and write results in any
  register
• Transfer memory data into registers, output
• Transfer register data into memory, output