RF Triangulator: Indoor/Outdoor Location Finding 18-525 Architecture Proposal Giovanni Fonseca David Fu Amir Ghiti Stephen Roos Design Manager: Myron Kwai - PowerPoint PPT Presentation

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RF Triangulator: Indoor/Outdoor Location Finding 18-525 Architecture Proposal Giovanni Fonseca David Fu Amir Ghiti Stephen Roos Design Manager: Myron Kwai

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By acquiring signal data from 3 or more wireless access points it will be ... handheld computers, watches, or shopping carts for locations ranging from large ... – PowerPoint PPT presentation

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Title: RF Triangulator: Indoor/Outdoor Location Finding 18-525 Architecture Proposal Giovanni Fonseca David Fu Amir Ghiti Stephen Roos Design Manager: Myron Kwai


1
RF Triangulator Indoor/Outdoor Location
Finding 18-525 Architecture Proposal Giovanni
FonsecaDavid FuAmir GhitiStephen RoosDesign
Manager Myron Kwai
  • Project Objective
  • Design a Radio-Frequency indoor/outdoor
    navigation system, utilizing the existing
    wireless infrastructure.

2
Project Description
  • Using existing 802.11 wireless signals it is
    possible to calculate ones location without the
    use of GPS.
  • The RF Triangulator will use current
    infrastructures to act as an indoor/outdoor local
    positioning system
  • By acquiring signal data from 3 or more wireless
    access points it will be possible to determine
    ones coordinates to within 1 meter.

3
RF Triangulator Applications
  • Our chip can be integrated into handheld
    computers, watches, or shopping carts for
    locations ranging from large theme parks to
    office buildings.
  • It will be able to quickly provide your current
    location as well as provide a distance and
    heading to a future location for path-finding
    purposes.

4
Triangulation Process
  • Our chip will solve for the simultaneous solution
    of 3 circle equations.

5
Major Functional Components
  • Top 3 / Queue module
  • Gives priority to the top 3 signals based on
    their
  • Signal-to-Noise Ratios
  • Lookup Table Module
  • Hard coded data of MAC addresses, X and Y
    coordinates.
  • Calc Module
  • Given the coordinates of 3 Access Points and
    their distance, it will calculate the current
    position.

6
Hardware Priority Queuing
  • Our chip dynamically sorts the three strongest
    signals in the Top 3 and maintains a queue of
    four more recently used signals.
  • Each signal information is the average of the
    last four received signals from that access point
    to prevent random noise to interfere with a
    correct triangulation calculation.

7
Programmable Memory
  • An SRAM lookup table stores individual access
    point data including MAC address, X and Y
    coordinates.
  • Map information can be loaded into memory
    (off-chip) and as required the chip can load the
    on-chip SRAM with smaller chunks of map
    information.

8
Calc A Custom Datapath
  • The calculation requires 1 12-bit FP
    Multiply/Divider, 2 12-bit FP Adders, 1 12-bit
    Comparator, 1 Log Shifter.
  • Entire calculation requires 32 cycles, with up to
    four mathematical computations per cycle
    (including data forwarding to save cycles and
    square root approximation).

9
The Computation
10
Design Process
  • Original specifications for the chip included
    16-bit floating point calculations and a waypoint
    finder that would calculate distance and
    direction to your desired location.
  • Size and complexity constraints reduced floating
    point numbers to 12-bits and eliminated waypoint
    calculation.

11
Floorplan Original Proposal
12
Floorplan Evolution
13
Floorplan Evolution
14
Floorplan Evolution
15
Floorplan Evolution
16
Road to Verification
  • Verify Behavior (done)
  • Verify Logic (done)
  • Verify Schematic (done)
  • Verify Layout (in progress)
  • Verify Timing (in progress)

17
Specifications
  • Total 52,072 transistors
  • Top Three 29,322 trans.
  • 3 x FPU Add/Sub Units 4500 trans.
  • Registers 16104 trans.
  • Muxes Computation 8718 trans.
  • Calc 19,976 trans.
  • 2 x FPU Add/Sub Unit 3000 trans.
  • 1 x FPU Mult/Div Unit 5000 trans.
  • 1 x Shifter 206 trans.
  • 1 x Comparator 800 transistors.
  • FSM Logic 1106 transistors
  • 25 x 12-bit Registers 6600 trans. total
  • 8-1,6-1,4-1,2-1 Mux Sets 3264 trans. total
  • Lookup 2,774 trans.
  • Control Registers Muxes 2000 trans.
  • Control Logic 163 trans.
  • Computation 611 trans.
  • SRAM 12k trans.
  • count not including SRAM, with SRAM 64k

18
Conclusions
  • Our project turned out to be much bigger than any
    of us imagined.
  • Lots of work to dovery little time.
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