EDK 7.1 Tutorial SystemACE and EthernetMAC on Avnet Virtex II pro Development Boards

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EDK 7.1 Tutorial -- SystemACE and EthernetMAC on
Avnet Virtex II pro Development Boards

• Chia-Tien Dan Lo
• Department of Computer Science
• University of Texas at San Antonio

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Goals

• Avnet Virtex II pro Development is equipped with
  compact flash memory and gigabit Ethernet
  interface.
• To build a working platform
• Store system in the compact flash
• Configure FPGAs from compact flash
• Retrieve network packets directly from the
  Ethernet interface
• Store results back to compact flash
• Use XMD to assist software development and test

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Premise

• Software
• Using EDK 7.1 and ISE 7.1
• Download Avnet XBD file for EDK 7.1
• Using Windows XP
• Hardware
• Using Avnet Virtex-II pro development board
  (XC2VP30-6)
• Xilinx Parallel Cable IV (DLC7)
• ADS-DB9-MD7 Cable

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Setup

• Connect Xilinx Parallel Cable IV from PCs
  printer port to JTAG4 on Avnet board
• Omit this if using PCI interface
• Connect ADS-DB9-MD6-Cable from PCs Com1 port to
  JS1 on Avnet board
• Connect J8 to a Ethernet router

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Using EDK7.1 BSB Wizard

• In case Base System Builder Wizard wont create a
  new directory, manually create a project
  directory, say c\download\SysaceEthernetTest
• Start EDK 7.1 and check Base System Builder
  Wizard

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Use Base System Builder Wizard
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Browse the directory SystemaceEthernetTest
created early
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Create a new design
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Select Avnet Virtex-II pro Board
Note the Avnet XBD file has to be stored in the
directory C\EDK7.1i\board\Xilinx\boards\Avnet_V
2P30_FF896
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Select PowerPC
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Configure Processor

• Set processor clock to 300 MHz
• Set FPGA JTAG
• Enable cache
• On-Chip Memory
• Data 64K
• Instruction 128K

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Configure Processor (cont.)
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Set I/O Interface

• Set RS232 to
• OPB UARTLITE
• 19200 bps
• 8 data bits
• No parity
• Use interrupt
• Uncheck
• SDRAM_64Mx16
• SRAM

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Set I/O Interface (cont.)
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Set System ACE and Ethernet

• Uncheck
• FLASH_4Mx32
• Check
• SysACE_CompactFlash
• OPB SYSACE
• Use Interrupt
• Ethernet_MAC
• PLB ETHERNET
• No DMA
• Use Interrupt

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Set System ACE and Ethernet (cont.)
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Set Internal Peripheral

• Set PLB BRAM IF CNTLR
• plb_bram_if_cntlr_1
• 16K

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Set Internal Peripheral (cont.)
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Set Internal Peripheral (cont.)
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Software Setup

• Set standard I/O to RS232
• Check
• Memory Test
• Peripheral SelfTest

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Software Setup (cont.)
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Configure memory for test applications

• Set instructions to on-chip instruction memory
  (iocm_cntlr)
• Set data and stack/heap to on-chip data memory
  (docm_cntlr)

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Configure memory for test applications (cont.)
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Configure memory for test applications (cont.)
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Create System
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Configure Drivers and Libraries
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Check xilfatfs
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Set PROC_INSTANCE to ppc405_0 for xilfatfs
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Build Hardware Toos-Update BitstreamThis step
may take hours subject to the performance of the
PC!
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Build Software Tools - Build All User
Applications
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Download Hardware Design to FPGAs

• Start iMPACT from XPs start menu (EDKs download
  function may not work!)
• Assign implementation/download.bit to XC2VP30
  device

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Download Hardware Design to FPGAs (cont.)
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Download Hardware Design to FPGAs (cont.)
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Start a 19200 hyper terminal
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Start XMD Tools - XMD
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Download Test Applications

• In XMD console
• Change directory to applications
• cd TestApp_Peripheral
• Download the design
• dow executable.elf
• Run the application
• run
• Monitor the output in the hyper terminal
• Some messages should be shown if everything is
  okay

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References

• Xilinx Platform Studio User Guide, Embedded
  Development Kit EDK 7.1
• Xilinx Embedded System Tools Reference Manual,
  Embedded Development Kit EDK 7.1i
• Xilinx Platform Specification Format Reference
  Manual, Embedded Development Kit EDK 7.1i
• Xilinx OS and Libraries Document Collection
• Xilinx EDK PowerPC Tutorial
• Avnet Users Guide, Xilinx Virtex-II Pro
  Development Kit