Spectral Characterization of Functional Vectors for Gate-level Fault Coverage Tests

1
Spectral Characterization of Functional Vectors
for Gate-level Fault Coverage Tests

• Nitin Yogi and Vishwani D. Agrawal
• Auburn University
• Department of ECE, Auburn, AL 36849, USA
• yoginit_at_auburn.edu, vagrawal_at_eng.auburn.edu

2
Outline

• Verification and Testing
• Problem and Approach
• Spectral analysis and generation of test
  sequences
• Test sequence compaction
• Experimental Results
• Conclusion
• References

3
Verification and Testing

• Verification vectors
• are mandatory and required to check for
  functional correctness of a digital system
• are generated based on the behavior of the system
• have been found useful in detection of
  manufacture defects like timing faults
• have low stuck-at fault coverage (poor defect
  level), but no yield loss
• Manufacturing tests
• may be non-functional cannot be used for
  verification
• have high test generation complexity
• have high stuck-at fault coverage

4
Problem and Approach

• The problem
• To develop manufacturing tests from verification
  vectors.
• Our approach
• Implementation-independent characterization
• Functional vectors obtained either from design
  verification phase or by exercising various
  functions of the circuit.
• Characterization of verification vectors for
  spectral components and the noise level for each
  PI of the circuit.
• Test generation for gate-level implementation
• Generation of spectral vectors
• Fault simulation and vector compaction

5
Verification vectors
State Diagram (b02 ckt.)
Behavioral Description (s344 ckt.)
A
A
B
4 bits
4 bits
Cases to verify all state transitions
X / 0
4 bit multiplier
1 / 0
B
1 / 0
0 / 0
F
C
Y
8 bits
1 / 0
X / 1
0 / 0
Cases to verify
A B
Non-zero Non-zero
0 Non-zero
Non-zero 0
0 0
Max no. Max no.
Other cases Other cases
G
D
X / 0
0 / 0
Input / output
E
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Walsh Functions and Hadamard Spectrum
w0

• Walsh functions form an orthogonal and complete
  set of basis functions that can represent any
  arbitrary bit-stream.
• Walsh functions are the rows of the Hadamard
  matrix.
• Example of Hadamard matrix of order 8

w1
w2
w3
Walsh functions (order 8)
1 1 1 1 1 1 1 1 1 -1 1 -1 1 -1 1 -1 1
1 -1 -1 1 1 -1 -1 1 -1 -1 1 1 -1 -1 1 1 1
1 1 -1 -1 -1 -1 1 -1 1 -1 -1 1 -1 1 1 1 -1
-1 -1 -1 1 1 1 -1 -1 1 -1 1 1 -1
H8
w4
w5
w6
w7
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Characterizing a Bit-Stream

• A bit-stream is correlated with each row of
  Hadamard matrix.
• Highly correlated basis Walsh functions are
  retained as essential components and others are
  regarded as noise.

Bit stream to analyze
Correlating with Walsh functions by multiplying
with Hadamard matrix.
Bit stream
Spectral coeffs.
Essential component (others noise)
Hadamard Matrix
8
Test Vector Generation

• Spectrum for new bit-streams consists of the
  essential components and added random noise.
• Essential component plus noise spectra are
  converted into bit-streams by multiplying with
  Hadamard matrix.
• Any number of bit-streams can be generated all
  contain the same essential components but differ
  in their noise spectrum.

Perturbation
Spectral components
Generation of test vectors by multiplying with
Hadamard matrix
Essential component retained
New test vector
9
Spectral Testing Approach (Circuit
Characterization)

• Verification vector generation
• Verification vectors are generated to exercise
  various functions of the circuit including its
  corner cases.
• Spectral analysis
• Verification sequences for each input are
  analyzed using Hadamard matrix.
• Essential components are determined by comparing
  their power Hi2 with the average power per
  component M2.
• Condition to pick-out essential components
  where K is a constant
• The process starts with the highest magnitude
  component and is repeated till the criteria is
  not satisfied.

10
Circuit s298 Coefficient Analysis
Examples of noise components
Examples of essential components
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Functional Verification Vectors for Spectral ATPG

• Start with functional verification vectors.
• Characterize verification vectors for Walsh
  spectrum and noise level.
• Generate new sequences by adding random noise to
  the Walsh spectrum.
• Use fault simulator (Flextest) and integer linear
  program (ILP) to compact sequences.

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Selecting Minimal Vector Sequences Using ILP

• A set of perturbation vector sequences V1, V2,
  .. , VM is generated, fault simulated and faults
  detected by each is obtained.
• Compaction problem Find minimum set of vector
  sequences that cover all detected faults.
• Minimize CountV1, ,VM to obtain compressed
  seq. V1, ,VC where V1, ,VC V1, ,
  VM CountV1, ,VC CountV1, ,VM Fault
  CoverageV1, ,VC Fault CoverageV1, ,VM
• Compaction problem is formulated as an Integer
  Linear Program (ILP) 1.

1 P. Drineas and Y. Makris, Independent
Test Sequence Compaction through Integer
Programming," Proc. ICCD03, pp. 380-386.
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ILP formulation

• Each vector sequence in V1, V2, .. , VM is
  fault simulated with the circuit in unknown state
• Faults detected by each sequence is obtained
• Variable xi defined for each vector seq. Visuch
  that xi 0 vec. seq. Vi not selected
  1 vec. seq. Vi selected
• Constraint equation formulated for each detected
  fault fk.
• For example, if fault f3 is detected by vec.
  sequences V3, V4 and V11, then the constraint
  equation is x3 x4 x11 1
• Solve for objective functionMinimize

14
Experimental Circuits

• Spectral ATPG technique applied to the following
  benchmarks
• three ISCAS89 circuits.
• one ITC99 high level RTL circuit
• Parwan microprocessor
• Characteristics of benchmark circuits
• Fault simulation performed using commercial
  sequential ATPG tool Mentor Graphics FlexTest.
• Results obtained on Sun Ultra 5 machines with
  256MB RAM.

Circuit Benchmark PIs POs FFs Function
s298 ISCAS89 3 6 14 Traffic light controller
s344 ISCAS89 9 11 15 4 x 4 add-shift multiplier
s349 ISCAS89 9 11 15 4 x 4 add-shift multiplier
b02 ITC99 2 1 4 Finite-state machine
15
ATPG Results
Circuit No. of gate faults Functional Vectors Functional Vectors Spectral ATPG Spectral ATPG Spectral ATPG Gate-level ATPG Gate-level ATPG Gate-level ATPG
Circuit No. of gate faults No. of vecs. Fault Cov. () No. of vecs. Fault Cov. () CPU (s) No. of vecs. Fault Cov. () CPU (s)
s298 698 75 81.23 192 84.74 21 152 85.89 45
s344 1020 57 87.45 256 91.08 51 150 90.78 23
s349 1030 57 87.09 256 90.68 51 150 90.39 26
b02 148 13 85.47 128 93.92 10 38 94.26 1
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Functional Spectral ATPG s298
Spectral ATPG Gate-level ATPG Functional
vectors Random vectors
17
Functional Spectral ATPG ITC99 Benchmark b02
(FSM)
18
Parwan Microprocessor
Reference Z. Navabi, Analysis and Modeling of
Digital Systems, NY McGraw-Hill, 1993.
19
Parwan Spectral ATPG
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Conclusion

• Spectral ATPG technique for verification vectors
  is applied to three ISCAS89 and one ITC99
  benchmark circuits.
• Coverage of functional vectors can be effectively
  improved to match that of a gate-level ATPG by
  the proposed method.
• Test generation using Spectral ATPG brings with
  it all the benefits of high level testing
• Techniques that will enhance Spectral ATPG are
• Accurate determination and use of noise
  components
• Better compaction algorithms

21
References

• N. Yogi and V. D. Agrawal, High-Level Test
  Generation for Gate-Level Fault Coverage, Proc.
  15th IEEE North Atlantic Test Workshop, May 2006,
  pp. 65-74.
• N. Yogi and V. D. Agrawal, Spectral RTL Test
  Generation for Gate-Level Stuck-at Faults, Proc.
  19th IEEE Asian Test Symp., November 2006.
• N. Yogi and V. D. Agrawal, Spectral RTL Test
  Generation for Microprocessors, submitted.